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Renesas RX Series User Manual

Renesas RX Series
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R01UH0823EJ0100 Rev.1.00 Page 651 of 1823
Jul 31, 2019
RX23W Group 24. Port Output Enable 2 (POE2a)
24.3 Operation
The target pins for high-impedance control and conditions to place the pins in high-impedance are described below.
(1) MTU0 pin (MTIOC0A)
When any of the following conditions is satisfied, the pin is placed to the high-impedance state.
ï‚· POE8# input level detection
When the ICSR2.POE8F flag is set to 1 with POECR1.PE0ZE and ICSR2.POE8E set to 1.
ï‚· SPOER setting
When the SPOER.CH0HIZ bit is set to 1 with POECR1.PE0ZE set to 1.
ï‚· Detection of stopped oscillation
When the OSTSTF flag is set to 1 with POECR1.PE0ZE and ICSR3.OSTSTE set to 1.
ï‚· Event signal reception from the ELC
(2) MTU0 pin (MTIOC0B)
When any of the following conditions is satisfied, the pin is placed to the high-impedance state.
ï‚· POE8# input level detection
When the ICSR2.POE8F flag is set to 1 with POECR1.PE1ZE and ICSR2.POE8E set to 1.
ï‚· SPOER setting
When the SPOER.CH0HIZ bit is set to 1 with POECR1.PE1ZE set to 1.
ï‚· Detection of stopped oscillation
When the OSTSTF flag is set to 1 with POECR1.PE1ZE and ICSR3.OSTSTE set to 1.
ï‚· Event signal reception from the ELC
(3) MTU0 pin (MTIOC0C)
When any of the following conditions is satisfied, the pin is placed to the high-impedance state.
ï‚· POE8# input level detection
When the ICSR2.POE8F flag is set to 1 with POECR1.PE2ZE and ICSR2.POE8E set to 1.
ï‚· SPOER setting
When the SPOER.CH0HIZ bit is set to 1 with POECR1.PE2ZE set to 1.
ï‚· Detection of stopped oscillation
When the OSTSTF flag is set to 1 with POECR1.PE2ZE and ICSR3.OSTSTE set to 1.
ï‚· Event signal reception from the ELC
(4) MTU3 pins (MTIOC3B and MTIOC3D)
When any of the following conditions is satisfied, the pins are placed to the high-impedance state.
ï‚· POE0#, POE1#, and POE3# input level detection
When the ICSR1.POE3F, POE1F, or POE0F flag is set to 1 with POECR2.P1CZEA set to 1.
ï‚· MTIOC3B and MTIOC3D output level comparison
When the OCSR1.OSF1 flag is set to 1 with POECR2.P1CZEA and OCSR1.OCE1 set to 1.
ï‚· SPOER setting
When the SPOER.CH34HIZ bit is set to 1 with POECR2.P1CZEA set to 1.
ï‚· Detection of stopped oscillation
When the ICSR3.OSTSTF flag is set to 1 with POECR2.P1CZEA and ICSR3.OSTSTE set to 1.
ï‚· Event signal reception from the ELC

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Renesas RX Series Specifications

General IconGeneral
BrandRenesas
ModelRX Series
CategoryMicrocontrollers
LanguageEnglish

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