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Renesas RX Series User Manual

Renesas RX Series
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R01UH0823EJ0100 Rev.1.00 Page 935 of 1823
Jul 31, 2019
RX23W Group 32. USB 2.0 Host/Function Module (USBc)
32.3.4.1 Pipe Control Register Switching Procedures
The following bits in the pipe control registers can be modified only when USB communication is prohibited (PID[1:0] =
00b (NAK)).
The following shows the registers and bits that should not be modified when USB communication is enabled (PID[1:0] =
01b (BUF)).
ï‚· Bits in the DCPCFG and DCPMAXP registers
ï‚· The SQCLR and SQSET bits in the DCPCTR register
ï‚· Bits in registers PIPECFG, PIPEMAXP, and PIPEPERI
ï‚· The ATREPM, ACLRM, SQCLR, and SQSET bits in the PIPEnCTR register
ï‚· Bits in the PIPEnTRE and PIPEnTRN registers
In order to modify the above bits in the USB communication enabled (PID[1:0] = 01b (BUF)) state, follow the procedure
shown below:
1. A request to modify bits in the pipe control register occurs.
2. Modify the PID[1:0] bits corresponding to the pipe to 00b (NAK).
3. Wait until the corresponding PBUSY flag is set to 0.
4. Modify the bits in the pipe control register.
The following bits in the pipe control registers can be modified only when the pertinent pipe information has not been set
by the CURPIPE[3:0] bits in registers CFIFOSEL, D0FIFOSEL, and D1FIFOSEL.
Registers that should not be set when the CURPIPE[3:0] bits are set:
ï‚· Bits in the DCPCFG and DCPMAXP register
ï‚· Bits in registers PIPECFG, PIPEMAXP and PIPEPERI
In order to modify pipe information, the CURPIPE[3:0] bits in the port select registers should be set to a pipe other than
the pipe to be modified. For the DCP, the buffer should be cleared using the BCLR bit in the port control register after the
pipe information is modified.
32.3.4.2 Transfer Types
The PIPECFG.TYPE[1:0] bits are used to specify the transfer type for each pipe. The transfer types that can be set for the
pipes are as follows.
ï‚· DCP: No setting is necessary (fixed at control transfer).
ï‚· PIPE1 and PIPE2: These should be set to bulk transfer or isochronous transfer.
ï‚· PIPE3 to PIPE5: These should be set to bulk transfer.
ï‚· PIPE6 to PIPE9: These should be set to interrupt transfer.
32.3.4.3 Endpoint Number
The PIPECFG.EPNUM[3:0] bits are used to set the endpoint number for each pipe. The DCP is fixed at endpoint 0. The
other pipes can be set from endpoint 1 to endpoint 15.
ï‚· DCP: No setting is necessary (fixed at endpoint 0).
ï‚· PIPE1 to PIPE9: The endpoint numbers from 1 to 15 should be selected and set.
These should be set so that the combination of the PIPECFG.DIR bit and EPNUM[3:0] bits is unique.

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Renesas RX Series Specifications

General IconGeneral
BrandRenesas
ModelRX Series
CategoryMicrocontrollers
LanguageEnglish

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