R01UH0823EJ0100 Rev.1.00 Page 1497 of 1823
Jul 31, 2019
RX23W Group 43. Capacitive Touch Sensing Unit (CTSU)
43.2.5 CTSU Measurement Channel Register 0 (CTSUMCH0)
Note 1. Writing to these bits is enabled only in self-capacitance single scan mode (CTSUCR1.CTSUMD[1:0] bits = 00b).
The CTSUMCH0 register should be set when CTSUCR0.CTSUSTRT bit is 0.
CTSUMCH0[5:0] Bits (CTSU Measurement Channel 0)
These bits set the channel to be measured in self-capacitance single scan mode, and indicate the receive channel that is
being measured in other modes.
Set only enabled channels (000010b, 000011b, 000100b, 000111b, 001000b, 001100b, 001101b, 010110b, 010111b,
011011b, 011110b, 100011b) when setting channels in self-capacitance single scan mode. In other modes, writing to
these bits has no effect.
Address(es): CTSU.CTSUMCH0 000A 0904h
b7 b6 b5 b4 b3 b2 b1 b0
— — CTSUMCH0[5:0]
Value after reset:
00111111
Bit Symbol Bit Name Description R/W
b5 to b0 CTSUMCH0[5:0] CTSU Measurement Channel 0 In self-capacitance single scan
b5 b0
0 0 0 0 1 0: TS2
0 0 0 0 1 1: TS3
0 0 0 1 0 0: TS4
0 0 0 1 1 1: TS7
0 0 1 0 0 0: TS8
0 0 1 1 0 0: TS12
0 0 1 1 0 1: TS13
0 1 0 1 1 0: TS22
0 1 0 1 1 1: TS23
0 1 1 0 1 1: TS27
0 1 1 1 1 0: TS30
1 0 0 0 1 1: TS35
Other than above: Starting measurement operation
(CTSUCR0.CTSUSTRT bit = 1) is prohibited after
these bits are set.
In other measurement modes
b5 b0
0 0 0 0 1 0: TS2
0 0 0 0 1 1: TS3
0 0 0 1 0 0: TS4
0 0 0 1 1 1: TS7
0 0 1 0 0 0: TS8
0 0 1 1 0 0: TS12
0 0 1 1 0 1: TS13
0 1 0 1 1 0: TS22
0 1 0 1 1 1: TS23
0 1 1 0 1 1: TS27
0 1 1 1 1 0: TS30
1 0 0 0 1 1: TS35
1 1 1 1 1 1: Measurement is stopped
R/W*
1
b7, b6 — Reserved These bits are read as 0. The write value should be 0. R/W
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