Renesas RX Series User Manual

R01UH0823EJ0100 Rev.1.00 Page 1453 of 1823
Jul 31, 2019
RX23W Group 40. SD Host Interface (SDHIa)
40.3.6.2 Command Absent of Data Transfer
Figure 40.9 shows an example of no data being transferred after the SDHI issues a command.
1. Set the flags in registers SDSTS1 and SDSTS2 to 0.
2. Set the SDHI clock in the SDCLKCR register, and set the interrupt requests to be masked in registers SDIMSK1
and SDIMSK2. Refer to
section 40.5.5 for details on setting the SDCLKCR register.
3. After setting the argument field value in the SDARG register, write the information of the command to be issued to
the SDCMD register. The SDHI issues a command when a value is written to the SDCMD register.
4. After a response is received, the SDSTS1.RSPEND flag becomes 1, and a response end interrupt request is
generated.
5. Set the SDSTS1.RSPEND flag to 0, and read the response stored in the SDRSP10 register.
Perform error processing (clear the interrupt flag) if a communication error or timeout occurs.
Figure 40.9 Command Issued That Is Absent of Data Transfer
Clear the flag register
Set the SDCLKCR register
SDIMSK1 = 0000 FFFEh
SDIMSK2 = 0000 7F80h
SDARG = Argument field value
SDCMD = Command to be issued
Command issued in which
data transfer is not performed
Response end or
error occurred?
SDSTS1 = 0000 FFFEh Clear the flags.
Error (communication error or timeout)
Error processing
(clear the interrupt flags)
No
Yes
Read the SDRSP10 register Check the response.
Start
End

Renesas RX Series Specifications

General

Core	RXv1, RXv2, RXv3
Flash Memory	Up to 8 MB
RAM	Up to 1 MB
Operating Voltage	1.62V to 5.5V
Operating Temperature	-40°C to +85°C or +105°C
Package	BGA, LQFP
ADC Resolution	12-bit
DAC Resolution	12-bit
Communication Interfaces	SCI, SPI, I2C, USB, Ethernet, CAN
Architecture	32-bit
Security Features	Memory Protection Unit (MPU)