R01UH0823EJ0100 Rev.1.00 Page 216 of 1823
Jul 31, 2019
RX23W Group 10. Clock Frequency Accuracy Measurement Circuit (CAC)
10.2.5 CAC Status Register (CASTR)
FERRF Flag (Frequency Error Flag)
This flag indicates deviation of the clock frequency from the set value (frequency error).
[Setting condition]
The clock frequency is outside of the setting range.
[Clearing condition]
1 is written to the CAICR.FERRFCL bit.
MENDF Flag (Measurement End Flag)
This flag indicates the end of measurement.
[Setting condition]
Measurement has finished.
[Clearing condition]
1 is written to the CAICR.MENDFCL bit.
OVFF Flag (Overflow Flag)
This flag indicates that the counter has overflowed.
[Setting condition]
The counter has overflowed.
[Clearing condition]
1 is written to the CAICR.OVFFCL bit.
Address(es): 0008 B004h
b7 b6 b5 b4 b3 b2 b1 b0
—————OVFFMENDFFERRF
Value after reset:
00000000
Bit Symbol Bit Name Description R/W
b0 FERRF Frequency Error Flag 0: The clock frequency is within the range corresponding to
the settings.
1: The clock frequency has deviated beyond the range
corresponding to the settings (frequency error).
R
b1 MENDF Measurement End Flag 0: Measurement is in progress.
1: Measurement has ended.
R
b2 OVFF Overflow Flag 0: The counter has not overflowed.
1: The counter has overflowed.
R
b7 to b3 — Reserved These bits are read as 0. The write value should be 0. R/W
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