Renesas RX Series User Manual

R01UH0823EJ0100 Rev.1.00 Page 1486 of 1823
Jul 31, 2019
RX23W Group 42. Trusted Secure IP (TSIP-Lite)
Figure 42.7 Encryption Flow Chart
START
in encryption engine active mode
Input of the initialization vector
Only when input of an initialization vector
is required
Input the key generation information
Checking the integrity of the key
generation information
Setting the key
Set the DMAC
Set the ICU
Input the plaintext
Encryption of the data
Output the encrypted data
TSIP-Lite library uses the unique ID
END
in TSIP-Lite enabled mode

Renesas RX Series Specifications

General

Core	RXv1, RXv2, RXv3
Flash Memory	Up to 8 MB
RAM	Up to 1 MB
Operating Voltage	1.62V to 5.5V
Operating Temperature	-40°C to +85°C or +105°C
Package	BGA, LQFP
ADC Resolution	12-bit
DAC Resolution	12-bit
Communication Interfaces	SCI, SPI, I2C, USB, Ethernet, CAN
Architecture	32-bit
Security Features	Memory Protection Unit (MPU)