Renesas RX Series User Manual

R01UH0823EJ0100 Rev.1.00 Page 281 of 1823
Jul 31, 2019
RX23W Group 15. Interrupt Controller (ICUb)
WDTST Flag (WDT Underflow/Refresh Error Status Flag)
This flag indicates the WDT underflow/refresh error interrupt request.
The WDTST flag is read-only, and cleared by the NMICLR.WDTCLR bit.
[Setting condition]
 When the WDT underflow/refresh error interrupt is generated
[Clearing condition]
 When 1 is written to the NMICLR.WDTCLR bit
IWDTST Flag (IWDT Underflow/Refresh Error Status Flag)
This flag indicates the IWDT underflow/refresh error interrupt request.
The IWDTST flag is read-only, and cleared by the NMICLR.IWDTCLR bit.
[Setting condition]
 When the IWDT underflow/refresh error interrupt is generated while this interrupt is enabled at its source.
[Clearing condition]
 When 1 is written to the NMICLR.IWDTCLR bit
LVD1ST Flag (Voltage Monitoring 1 Interrupt Status Flag)
This flag indicates the request for voltage monitoring 1 interrupt.
The LVD1ST flag is read-only, and cleared by the NMICLR.LVD1CLR bit.
[Setting condition]
 When the voltage monitoring 1 interrupt is generated while this interrupt is enabled at its source.
[Clearing condition]
 When 1 is written to the NMICLR.LVD1CLR bit
VBATST Flag (VBATT Voltage Monitoring Interrupt Status Flag)
This flag indicates the request for the VBATT voltage monitoring interrupt.
[Setting condition]
 When the VBATT voltage monitoring interrupt is generated while this interrupt is enabled at its source.
[Clearing condition]
 When 1 is written to the NMICLR.VBATCLR bit.

Renesas RX Series Specifications

General

Core	RXv1, RXv2, RXv3
Flash Memory	Up to 8 MB
RAM	Up to 1 MB
Operating Voltage	1.62V to 5.5V
Operating Temperature	-40°C to +85°C or +105°C
Package	BGA, LQFP
ADC Resolution	12-bit
DAC Resolution	12-bit
Communication Interfaces	SCI, SPI, I2C, USB, Ethernet, CAN
Architecture	32-bit
Security Features	Memory Protection Unit (MPU)