ADSP-21368 SHARC Processor Hardware Reference 4-41
Digital Audio/Digital Peripheral Interfaces
0100101 (0x25) SPORT5_CLK_O Select SPORT 5 clock
0100110 (0x26) SPORT0_FS_O Select SPORT 0 frame sync
0100111 (0x27) SPORT1_FS_O Select SPORT 1 frame sync
0101000 (0x28) SPORT2_FS_O Select SPORT 2 frame sync
0101001 (0x29) SPORT3_FS_O Select SPORT 3 frame sync
0101010 (0x2A) SPORT4_FS_O Select SPORT 4 frame sync
0101011 (0x2B) SPORT5_FS_O Select SPORT 5 frame sync
0101100 (0x2C) SPORT6_DA_O Select SPORT 6A data
0101101 (0x2D) SPORT6_DB_O Select SPORT 6B data
0101110 (0x2E) SPORT7_DA_O Select SPORT 7A data
0101111 (0x2F) SPORT7_DB_O Select SPORT 7B data
0110000 (0x30) PDAP_STRB_O Select PDAP data transfer request strobe
0110001–0110011 Reserved
0110100 (0x34) SPORT6_CLK_O Select SPORT 6 clock
0110101 (0x35) SPORT7_CLK_O Select SPORT 7 clock
0110110 (0x36) SPORT6_FS_O Select SPORT 6 frame sync
0110111 (0x37) SPORT7_FS_O Select SPORT 7 frame sync
0111000 (0x38) PCG_CLKA_O Select precision clock A
0111001 (0x39) PCG_CLKB_O Select precision clock B
0111010 (0x3A) PCG_FSA_O Select precision frame sync A
0111011 (0x3B) PCG_FSB_O Select precision frame sync B
0111100 (0x3C) Reserved
0111101 (0x3D) SRC0_DAT_OP_O SRC0 data output
0111110 (0x3E) SRC1_DAT_OP_O SRC1 data output
Table 4-7. Group D Sources—Pin Signal Assignments (Cont’d)
Selection Code Source Signal Description (Source)
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