ADSP-21368 SHARC Processor Hardware Reference xxvii
Contents
Sony/Philips Digital Interface Registers ...................................... A-86
Transmitter Control Register (DITCTL) ............................... A-86
Left Channel Status for Subframe A
Registers (DITCHANAx) .................................................. A-89
Right Channel Status for Subframe B
Registers (DITCHANBx) .................................................. A-90
User Bits Buffer Registers for Subframe A
Registers (DITUSRBITAx) ................................................ A-90
User Bits Buffer Registers for Subframe B
Registers (DITUSRBITBx) ................................................ A-91
Receiver Control Register (DIRCTL) .................................... A-92
Receiver Status Register (DIRSTAT) ..................................... A-94
Left Channel Status for Subframe A
Register (DIRCHANL) ...................................................... A-96
Right Channel Status for Subframe B
Register (DIRCHANR) ..................................................... A-96
Sample Rate Converter Registers ................................................ A-97
SRC Control Registers (SRCCTLx) ...................................... A-97
SRC Mute Register (SRCMUTE) ....................................... A-107
SRC Ratio Registers (SRCRATx) ........................................ A-108
DAI/DPI Registers ................................................................... A-109
Digital Audio Interface Status Register (DAI_STAT) ........... A-109
DAI Resistor Pull-up Enable Register
(DAI_PIN_PULLUP) ...................................................... A-111
DAI Pin Buffer Status Register (DAI_PIN_STAT) .............. A-112
DAI Interrupt Controller Registers ..................................... A-112
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