Analog Devices SHARC ADSP-21368

External Port Registers
A-12 ADSP-21368 SHARC Processor Hardware Reference
2B2SDSelect Bank 2 SDRAM.
1 = Bank 2 SDRAM
0 = Bank 2 Non-SDRAM
3B3SDSelect Bank 3 SDRAM.
1 = Bank 3 SDRAM
0 = Bank 3 Non-SDRAM
5–4 EPBR External Port Bus Priority.
00 = Reserved
01 = DMA has high priority
10 = Core has high priority
11 = Rotating Priority
7–6 DMAPR DMA Channel Priority for CH0 and CH1.
00 = Reserved
01 = Reserved
10 = Fixed priority
11 = Rotating priority
8Reserved
10–9 FRZDMA Arbitration Freezing Length for DMA.
0 = No freezing
1 = 4 Accesses
2 = 8 Accesses
3 = 16 Accesses
12–11 Reserved
14–13 FRZCR Arbitration Freezing Length for CORE Accesses.
0 = No freezing
1 = 4 Accesses
2 = 8 Accesses
3 = 16 Accesses
Table A-3. EPCTL Register Bit Descriptions (Cont’d)
Bit Name Description