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Renesas RX Series

Renesas RX Series
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R01UH0823EJ0100 Rev.1.00 Page 1427 of 1823
Jul 31, 2019
RX23W Group 40. SD Host Interface (SDHIa)
RSPEND Flag (Response End Detection Flag)
This flag becomes 1 under any of the following conditions:
A response is received.
A command that does not have a response is issued.
After the R1b response is received, the SDHI is released from the busy state.
During a multi-block transmission, after the SDIOMD.C52PUB bit is set to 1, the CMD52 response is received.
A communication error or timeout causes the command sequence to abort.
This flag becomes 0 under the following condition:
The flag is set to 0.
Note: When a command is issued that is absent of data transfer, the RSPEND flag becomes 1 after the command
sequence ends.
ACEND Flag (Access End Detection Flag)
This flag becomes 1 under any of the following conditions:
During a single block read sequence, the SD buffer read access is completed.
During a multi-block read sequence, the last block is read from the SD buffer.
During a multi-block read sequence, if CMD12 is automatically issued, data is read from the SD buffer, and the
response for CMD12 is received.
During a single block write sequence, after a CRC status token is received, the SDHI is released from the busy state.
During a multi-block write sequence, after a CRC status token is received for the last block, the SDHI is released
from the busy state.
During a multi-block write sequence, when CMD12 is automatically issued, a response busy of the automatically
issued CMD12 is received.
During a multi-block read sequence, when CMD12 is automatically issued, after setting the SDSTOP.STP bit to 1,
a response of the automatically issued CMD12 is received.
During a multi-block write sequence, when CMD12 is automatically issued, after setting the SDSTOP.STP bit to 1,
a response busy of the automatically issued CMD12 is received.
During a multi-block read sequence, after the SDIOMD.IOABT bit is set to 1, the response for CMD52 is received.
During a multi-block write sequence, after the SDIOMD.IOABT bit is set to 1, the response for CMD52 is received.
A communication error or timeout causes the command sequence to abort.
This flag becomes 0 under the following condition:
The flag is set to 0.
Note: The ACEND flag becomes 1 after the command sequence ends.
SDCDRM Flag (SDHI_CD Removal Flag)
This flag becomes 1 under the following condition:
The SDHI_CD pin changes from low to high, and the high period is the period set in the SDOPT.CTOP[3:0] bits or
longer.
This flag becomes 0 under the following condition:
The flag is set to 0.
SDCDIN Flag (SDHI_CD Insertion Flag)
This flag becomes 1 under the following condition:
The SDHI_CD pin changes from high to low, and the low period is the period specified in the SDOPT.CTOP[3:0]
bits or longer.
This flag becomes 0 under the following condition:
The flag is set to 0.

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