R01UH0823EJ0100 Rev.1.00 Page 152 of 1823
Jul 31, 2019
RX23W Group 7. Option-Setting Memory (OFSM)
WDTRPSS[1:0] Bits (WDT Window Start Position Select)
These bits select the position where the window for the down-counter starts as 25%, 50%, 75%, or 100% of the value
being counted (the point at which counting starts is 100% and the point at which an underflow occurs is 0%). The
interval between the positions where the window starts and ends becomes the period in which refreshing is possible, and
refreshing is not possible outside this period.
For details, refer to
section 30, Watchdog Timer (WDTA).
WDTRSTIRQS Bit (WDT Reset Interrupt Request Select)
The setting of this bit selects the operation on an underflow of the down-counter or generation of a refresh error. Either a
watchdog timer reset or a non-maskable interrupt request is selectable.
For details, refer to
section 30, Watchdog Timer (WDTA).
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