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Renesas RX Series User Manual

Renesas RX Series
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R01UH0823EJ0100 Rev.1.00 Page 1560 of 1823
Jul 31, 2019
RX23W Group 44. 12-Bit A/D Converter (S12ADE)
A/D channel select registers A0/A1/B0/B1 (ADANSA0, ADANSA1, ADANSB0, ADANSB1)
CMPCHB[5:0] in the window B channel select register (ADCMPBNSR.CMPCHB[5:0])
CMPAE Bit (Compare Window A Operation Enable)
This bit enables or disables the compare window A operation. The CMPAE bit should be set while the ADCSR.ADST bit
is 0.
Set this bit to 0 before setting the following registers.
A/D channel select registers A0/A1/B0/B1 (ADANSA0, ADANSA1, ADANSB0, ADANSB1)
Window A channel select registers 0/1 (ADCMPANSR0, ADCMPANSR1)
WCMPE Bit (Window Function Setting)
This bit enables or disables the window function. The WCMPE bit should be set while the ADCSR.ADST bit is 0.
OCSA or TSSA in the A/D conversion extended input control register (ADEXICR.OCSA, TSSA)
OCSA or TSSA in the A/D conversion extended input control register (ADEXICR.OCSA, TSSA)
Window A extended input select register (ADCMPANSER)

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Renesas RX Series Specifications

General IconGeneral
CoreRXv1, RXv2, RXv3
Flash MemoryUp to 8 MB
RAMUp to 1 MB
Operating Voltage1.62V to 5.5V
Operating Temperature-40°C to +85°C or +105°C
PackageBGA, LQFP
ADC Resolution12-bit
DAC Resolution12-bit
Communication InterfacesSCI, SPI, I2C, USB, Ethernet, CAN
Architecture32-bit
Security FeaturesMemory Protection Unit (MPU)

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