Renesas RX Series User Manual

R01UH0823EJ0100 Rev.1.00 Page 1568 of 1823
Jul 31, 2019
RX23W Group 44. 12-Bit A/D Converter (S12ADE)
Set bits 15 to 2 to the lower-side comparison level for comparison with the A/D-converted value of the same
channel. Write 0 to bits 1 and 0.
 Flush-left format (A/D-converted value addition mode and 16-time conversion selected)
Set bits 15 to 0 to the lower-side comparison level for comparison with the A/D-converted value of the same
channel.
When A/D-converted addition mode is selected, set the value added by the A/D-converted value of the same channel.
The number of A/D conversions can be set to 1, 2, 3, 4, or 16 times. If A/D-converted addition mode is selected, when
the A/D conversion count is set to 1 to 4 times, set the number of conversion accuracy bits extended by 2 bits in the
ADCMPDR0 register; when the A/D conversion count is set to 16 times, set the number of conversion accuracy bits
extended by 4 bits in the ADCMPDR0 register.
Even if A/D converted value addition mode is selected, set the reference data in the A/D data register according to the
settings of the A/D data register format select bits.

Renesas RX Series Specifications

General

Core	RXv1, RXv2, RXv3
Flash Memory	Up to 8 MB
RAM	Up to 1 MB
Operating Voltage	1.62V to 5.5V
Operating Temperature	-40°C to +85°C or +105°C
Package	BGA, LQFP
ADC Resolution	12-bit
DAC Resolution	12-bit
Communication Interfaces	SCI, SPI, I2C, USB, Ethernet, CAN
Architecture	32-bit
Security Features	Memory Protection Unit (MPU)