Renesas RX Series User Manual

R01UH0823EJ0100 Rev.1.00 Page 1670 of 1823
Jul 31, 2019
RX23W Group 50. Flash Memory (FLASH)
STOP Bit (Forced Processing Stop)
This bit is used to forcibly stop the processing (blank check, block erase, or all-block erase) being executed.
After setting this bit to 1, wait until the FSTATR1.FRDY flag is 1 (processing completed) before setting the OPST bit to
0.
OPST Bit (Processing Start)
This bit is used to execute the command set in the CMD[2:0] bits.
This bit is not set to 0 again even when the processing is completed. Confirm that the FSTATR1.FRDY flag is 1
(processing completed) before setting the OPST bit to 0 again. After that, confirm that the FRDY flag is 0 before
executing the next processing.
Table 50.4 Setting Address for All-Block Erase
Target Memory Size FSARH/FSARL FEARH/FEARL
ROM 512 Kbytes FC18 0000h FC1F FFF8h
384 Kbytes FC1A 0000h FC1F FFF8h
E2 DataFlash 8 Kbytes FE00 0000h FE00 1FFFh

Renesas RX Series Specifications

General

Core	RXv1, RXv2, RXv3
Flash Memory	Up to 8 MB
RAM	Up to 1 MB
Operating Voltage	1.62V to 5.5V
Operating Temperature	-40°C to +85°C or +105°C
Package	BGA, LQFP
ADC Resolution	12-bit
DAC Resolution	12-bit
Communication Interfaces	SCI, SPI, I2C, USB, Ethernet, CAN
Architecture	32-bit
Security Features	Memory Protection Unit (MPU)