33.10.6 Bit Rate Measurement ............................................................................................................ 1088
33.10.7 Selectable Timing for Sampling Data Received through RXDX12 ....................................... 1089
33.10.8 Timer ...................................................................................................................................... 1090
33.11 Noise Cancellation Function ........................................................................................................... 1092
33.12 Interrupt Sources .............................................................................................................................. 1093
33.12.1 Buffer Operations for TXI and RXI Interrupts ....................................................................... 1093
33.12.2 Interrupts in Asynchronous Mode, Clock Synchronous Mode, and Simple SPI Mode ......... 1093
33.12.3 Interrupts in Smart Card Interface Mode ................................................................................ 1094
33.12.4 Interrupts in Simple I
2
C Mode ............................................................................................... 1095
33.12.5 Interrupt Requests from the Extended Serial Mode Control Section ..................................... 1096
33.13 Event Linking .................................................................................................................................. 1097
33.14 Usage Notes ..................................................................................................................................... 1098
33.14.1 Setting the Module Stop Function .......................................................................................... 1098
33.14.2 Break Detection and Processing ............................................................................................. 1098
33.14.3 Mark State and Sending Breaks .............................................................................................. 1098
33.14.4 Receive Error Flags and Transmit Operations
(Clock Synchronous Mode and Simple SPI Mode) ................................................................ 1098
33.14.5 Writing Data to the TDR Register .......................................................................................... 1098
33.14.6 Restrictions on Clock Synchronous Transmission
(Clock Synchronous Mode and Simple SPI Mode) ................................................................ 1099
33.14.7 Restrictions on Using DMAC or DTC ................................................................................... 1100
33.14.8 Notes on Starting Transfer ...................................................................................................... 1100
33.14.9 SCI Operations during Low Power Consumption State ......................................................... 1100
33.14.10 External Clock Input in Clock Synchronous Mode and Simple SPI Mode ............................ 1103
33.14.11 Limitations on Simple SPI Mode ........................................................................................... 1104
33.14.12 Limitation 1 on Usage of the Extended Serial Mode Control Section ................................... 1105
33.14.13 Limitation 2 on Usage of the Extended Serial Mode Control Section ................................... 1105
33.14.14 Note on Transmit Enable Bit (TE Bit) .................................................................................... 1106
33.14.15 Note on Stopping Reception When Using the RTS Function in Asynchronous Mode .......... 1106
34. IrDA Interface ............................................................................................................................. 1107
34.1 Overview ......................................................................................................................................... 1107
34.2 Register Descriptions ....................................................................................................................... 1108
34.2.1 IrDA Control Register (IRCR) ...............................................................................................
1108
34.3 Operation ......................................................................................................................................... 1110
34.3.1 Transmission ........................................................................................................................... 1110
34.3.2 Reception ................................................................................................................................ 1111
34.3.3 Selecting High-Level Pulse Width ......................................................................................... 1111
34.4 Usage Notes ..................................................................................................................................... 1112
34.4.1 Module Stop Function Setting ................................................................................................ 1112
34.4.2 SCI5 Setting ............................................................................................................................ 1112
34.4.3 Minimum Pulse-Width during Reception ............................................................................... 1112
34.4.4 Notes on IrDA Initial Setting/Resetting ................................................................................. 1112
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