R01UH0823EJ0100 Rev.1.00 Page 337 of 1823
Jul 31, 2019
RX23W Group 17. Memory-Protection Unit (MPU)
(1) When a data memory-protection error is generated
Access-exception processing by the CPU saves the address of the instruction that led to the memory-protection error on
the stack. Furthermore, the address of the operand for which access led to a memory-protection error is stored in the data
memory-protection error address register (MPDEA) and the region information for the region where the memory-
protection error was generated is stored in the data-hit region register (MHITD).
Violations of access control in access to valid regions 0 to 7
The data-hit region bits (MHITD.HITD[7:0]) with the same region number as the region where the error occurred is set
to 1. In user mode, the logical “or” of the region access-control information for the location where the error occurred is
set in the data-hit region access-control bits (MHITD.UHACD[2:0]).
Violations of access control for the background region, besides access to outside valid regions 0 to 7
The data-hit region bits (MHITD.HITD[7:0]) are set to 0000 0000b. In user mode, the access-control information for the
background region is set in the data-hit region access-control bits (MHITD.UHACD[2:0]).
Referring to this information can pinpoint the sources of errors.
(2) When an instruction memory-protection error is generated
Access-exception processing by the CPU saves the address of the instruction that led to the memory-protection error on
the stack. Furthermore, the region information for the region where the memory-protection error was generated is stored
in the instruction-hit region register (MHITI).
Violations of access control in access to valid regions 0 to 7
The instruction-hit region bit (MHITD.HITI[7:0]) with the same region number as the region where the error occurred is
set to 1. In user mode, the logical “or” of the region access-control information for the location where the error occurred
is set in the instruction-hit region access-control bits (MHITI.UHACI[2:0]).
Violations of access control for the background region, besides access to outside valid regions 0 to 7
The instruction-hit region bits (MHITI.HITI[7:0]) are set to 0000 0000b. In user mode, the access-control information
for the background region is set in the instruction-hit region access-control bits (MHITI.UHACI[2:0]).
Referring to this information can pinpoint the sources of errors.
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