47.3 Operation ......................................................................................................................................... 1644
47.3.1 Comparator Bn Digital Filter (n = 2, 3) .................................................................................. 1648
47.3.2 Comparator Bn Output Function (n = 2, 3) ............................................................................ 1649
47.3.3 Example of Using Comparator B to Exit Software Standby Mode ........................................ 1649
47.4 Comparator B2 and Comparator B3 Interrupts ............................................................................... 1650
47.5 Usage Note ...................................................................................................................................... 1650
47.5.1 Module Stop Function Setting ................................................................................................ 1650
48. Data Operation Circuit (DOC) .................................................................................................... 1651
48.1 Overview ......................................................................................................................................... 1651
48.2 Register Descriptions ....................................................................................................................... 1652
48.2.1 DOC Control Register (DOCR) ............................................................................................. 1652
48.2.2 DOC Data Input Register (DODIR) ....................................................................................... 1653
48.2.3 DOC Data Setting Register (DODSR) ................................................................................... 1653
48.3 Operation ......................................................................................................................................... 1654
48.3.1 Data Comparison Mode .......................................................................................................... 1654
48.3.2 Data Addition Mode ............................................................................................................... 1655
48.3.3 Data Subtraction Mode ........................................................................................................... 1656
48.4 Interrupt Requests ............................................................................................................................ 1656
48.5 Event Link Output ........................................................................................................................... 1657
48.5.1 Interrupt Handling and Event Linking .................................................................................... 1657
48.6 Usage Note ...................................................................................................................................... 1657
48.6.1 Module Stop Function Setting ................................................................................................ 1657
49. RAM ........................................................................................................................................... 1658
49.1 Overview ......................................................................................................................................... 1658
49.2 Operation ......................................................................................................................................... 1658
49.2.1 Low Power Consumption Function ........................................................................................ 1658
49.2.2 Notes on Self-Diagnosis of the RAM ..................................................................................... 1658
50. Flash Memory (FLASH) ............................................................................................................. 1659
50.1 Overview .........................................................................................................................................
1659
50.2 ROM Area and Block Configuration ............................................................................................... 1660
50.3 E2 DataFlash Area and Block Configuration .................................................................................. 1661
50.4 Register Descriptions ....................................................................................................................... 1662
50.4.1 E2 DataFlash Control Register (DFLCTL) ............................................................................ 1662
50.4.2 Flash P/E Mode Entry Register (FENTRYR) ........................................................................ 1663
50.4.3 Protection Unlock Register (FPR) .......................................................................................... 1664
50.4.4 Protection Unlock Status Register (FPSR) ............................................................................. 1664
50.4.5 Flash P/E Mode Control Register (FPMCR) .......................................................................... 1665
50.4.6 Flash Initial Setting Register (FISR) ...................................................................................... 1666
50.4.7 Flash Reset Register (FRESETR) ........................................................................................... 1668
50.4.8 Flash Area Select Register (FASR) ........................................................................................ 1668
50.4.9 Flash Control Register (FCR) ................................................................................................. 1669
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