Renesas RX Series User Manual

R01UH0823EJ0100 Rev.1.00 Page 578 of 1823
Jul 31, 2019
RX23W Group 23. Multi-Function Timer Pulse Unit 2 (MTU2a)
Figure 23.71 Example of Operation When Buffer Transfer is Linked with Interrupt Skipping
(TBTER.BTE[1:0] = 10b)
MTU3.TCNT
MTU4.TCNT
TCNTSA
(1) When the buffer register is modified within one carrier cycle after a TGIA3 interrupt
Buffer transfer-enabled period
TITCR1A.T3ACOR[2:0] bits
TITCNT1A.T3ACNT[2:0] bits
Buffer register
Temporary register
Compare register
TGIA3 generated
MTU3.
TCNT
MTU4.
TCNT
Timing for modifying
the buffer register
Timing for modifying
the buffer register
Data
Data
Data
Data1
Data1
Data1
Data2
Data2
Data2
2
21100
TGIA3 generated
(2) When the buffer register is modified after one carrier cycle has elapsed after a TGIA3 interrupt
Buffer transfer-enabled period
TITCR1A.T3ACOR[2:0] bits
TITCNT1A.T3ACNT[2:0] bits
Buffer register
Temporary register
Compare register
TGIA3 generated
MTU3.
TCNT
MTU4.
TCNT
Timing for modifying the buffer register
Data
Data
Data
Data1
Data1
Data1
2
21100
TGIA3 generated
Note: Buffer transfer at the crest is selected.
The skipping count is set to two.
The TITCR1A.T3AEN bit is set to 1.
Buffer transfer disabled

Renesas RX Series Specifications

General

Core	RXv1, RXv2, RXv3
Flash Memory	Up to 8 MB
RAM	Up to 1 MB
Operating Voltage	1.62V to 5.5V
Operating Temperature	-40°C to +85°C or +105°C
Package	BGA, LQFP
ADC Resolution	12-bit
DAC Resolution	12-bit
Communication Interfaces	SCI, SPI, I2C, USB, Ethernet, CAN
Architecture	32-bit
Security Features	Memory Protection Unit (MPU)