Renesas RX Series User Manual

R01UH0823EJ0100 Rev.1.00 Page 84 of 1823
Jul 31, 2019
RX23W Group 2. CPU
Table 2.3 32-Bit Write Operations when Little Endian has been Selected
Operation
Address
of dest
Writing a 32-bit unit
to address 0
Writing a 32-bit unit
to address 1
Writing a 32-bit unit
to address 2
Writing a 32-bit unit
to address 3
Writing a 32-bit unit
to address 4
Address 0 Transfer from LL — — — —
Address 1 Transfer from LH Transfer from LL — — —
Address 2 Transfer from HL Transfer from LH Transfer from LL — —
Address 3 Transfer from HH Transfer from HL Transfer from LH Transfer from LL —
Address 4 — Transfer from HH Transfer from HL Transfer from LH Transfer from LL
Address 5 — — Transfer from HH Transfer from HL Transfer from LH
Address 6 — — — Transfer from HH Transfer from HL
Address 7 — — — — Transfer from HH
Table 2.4 32-Bit Write Operations when Big Endian has been Selected
Operation
Address
of dest
Writing a 32-bit unit
to address 0
Writing a 32-bit unit
to address 1
Writing a 32-bit unit
to address 2
Writing a 32-bit unit
to address 3
Writing a 32-bit unit
to address 4
Address 0 Transfer from HH — — — —
Address 1 Transfer from HL Transfer from HH — — —
Address 2 Transfer from LH Transfer from HL Transfer from HH — —
Address 3 Transfer from LL Transfer from LH Transfer from HL Transfer from HH —
Address 4 — Transfer from LL Transfer from LH Transfer from HL Transfer from HH
Address 5 — — Transfer from LL Transfer from LH Transfer from HL
Address 6 — — — Transfer from LL Transfer from LH
Address 7 — — — — Transfer from LL
Table 2.5 16-Bit Read Operations when Little Endian has been Selected
Operation
Address
of src
Reading
a 16-bit unit from
address 0
Reading
a 16-bit unit from
address 1
Reading
a 16-bit unit from
address 2
Reading
a 16-bit unit from
address 3
Reading
a 16-bit unit from
address 4
Reading
a 16-bit unit from
address 5
Reading
a 16-bit unit from
address 6
Address 0 Transfer to LL — — — — — —
Address 1 Transfer to LH Transfer to LL — — — — —
Address 2 — Transfer to LH Transfer to LL — — — —
Address 3 — — Transfer to LH Transfer to LL — — —
Address 4 — — — Transfer to LH Transfer to LL — —
Address 5————Transfer to LHTransfer to LL—
Address 6—————Transfer to LHTransfer to LL
Address 7——————Transfer to LH

Renesas RX Series Specifications

General

Core	RXv1, RXv2, RXv3
Flash Memory	Up to 8 MB
RAM	Up to 1 MB
Operating Voltage	1.62V to 5.5V
Operating Temperature	-40°C to +85°C or +105°C
Package	BGA, LQFP
ADC Resolution	12-bit
DAC Resolution	12-bit
Communication Interfaces	SCI, SPI, I2C, USB, Ethernet, CAN
Architecture	32-bit
Security Features	Memory Protection Unit (MPU)