Renesas RX Series User Manual

R01UH0823EJ0100 Rev.1.00 Page 85 of 1823
Jul 31, 2019
RX23W Group 2. CPU
Table 2.6 16-Bit Read Operations when Big Endian has been Selected
Operation
Address
of src
Reading
a 16-bit unit from
address 0
Reading
a 16-bit unit from
address 1
Reading
a 16-bit unit from
address 2
Reading
a 16-bit unit from
address 3
Reading
a 16-bit unit from
address 4
Reading
a 16-bit unit from
address 5
Reading
a 16-bit unit from
address 6
Address 0 Transfer to LH — — — — — —
Address 1 Transfer to LL Transfer to LH — — — — —
Address 2 — Transfer to LL Transfer to LH — — — —
Address 3 — — Transfer to LL Transfer to LH — — —
Address 4 — — — Transfer to LL Transfer to LH — —
Address 5————Transfer to LLTransfer to LH—
Address 6—————Transfer to LLTransfer to LH
Address 7——————Transfer to LL
Table 2.7 16-Bit Write Operations when Little Endian has been Selected
Operation
Address
of dest
Writing
a 16-bit unit to
address 0
Writing
a 16-bit unit to
address 1
Writing
a 16-bit unit to
address 2
Writing
a 16-bit unit to
address 3
Writing
a 16-bit unit to
address 4
Writing
a 16-bit unit to
address 5
Writing
a 16-bit unit to
address 6
Address 0 Transfer from LL — — — — — —
Address 1 Transfer from LH Transfer from LL — — — — —
Address 2 — Transfer from LH Transfer from LL — — — —
Address 3 — — Transfer from LH Transfer from LL — — —
Address 4 — — — Transfer from LH Transfer from LL — —
Address 5————Transfer from LHTransfer from LL—
Address 6—————Transfer from LHTransfer from LL
Address 7——————Transfer from LH
Table 2.8 16-Bit Write Operations when Big Endian has been Selected
Operation
Address
of dest
Writing
a 16-bit unit to
address 0
Writing
a 16-bit unit to
address 1
Writing
a 16-bit unit to
address 2
Writing
a 16-bit unit to
address 3
Writing
a 16-bit unit to
address 4
Writing
a 16-bit unit to
address 5
Writing
a 16-bit unit to
address 6
Address 0 Transfer from LH — — — — — —
Address 1 Transfer from LL Transfer from LH — — — — —
Address 2 — Transfer from LL Transfer from LH — — — —
Address 3 — — Transfer from LL Transfer from LH — — —
Address 4 — — — Transfer from LL Transfer from LH — —
Address 5————Transfer from LLTransfer from LH—
Address 6—————Transfer from LLTransfer from LH
Address 7——————Transfer from LL
Table 2.9 8-Bit Read Operations when Little Endian has been Selected
Operation
Address of src
Reading an 8-bit unit
from address 0
Reading an 8-bit unit
from address 1
Reading an 8-bit unit
from address 2
Reading an 8-bit unit
from address 3
Address 0 Transfer to LL — — —
Address 1 — Transfer to LL — —
Address 2 — — Transfer to LL —
Address 3 — — — Transfer to LL

Renesas RX Series Specifications

General

Core	RXv1, RXv2, RXv3
Flash Memory	Up to 8 MB
RAM	Up to 1 MB
Operating Voltage	1.62V to 5.5V
Operating Temperature	-40°C to +85°C or +105°C
Package	BGA, LQFP
ADC Resolution	12-bit
DAC Resolution	12-bit
Communication Interfaces	SCI, SPI, I2C, USB, Ethernet, CAN
Architecture	32-bit
Security Features	Memory Protection Unit (MPU)