R01UH0823EJ0100 Rev.1.00 Page 980 of 1823
Jul 31, 2019
RX23W Group 33. Serial Communications Interface (SCIg, SCIh)
RE Bit (Receive Enable)
Enables or disables serial reception.
When this bit is set to 1, serial reception is started by detecting the start bit. Note that the SMR register should be set prior
to setting the RE bit to 1 in order to designate the reception format.
Even if reception is halted by setting the RE bit to 0, the ORER, FER, and PER flags in the SSR register are not affected
and the previous value is retained.
TE Bit (Transmit Enable)
Enables or disables serial transmission.
When this bit is set to 1, serial transmission is started by writing transmit data to the TDR register. Note that the SMR
register should be set prior to setting the TE bit to 1 in order to designate the transmission format.
RIE Bit (Receive Interrupt Enable)
Enables or disables RXI and ERI interrupt requests.
An RXI interrupt request is disabled by setting the RIE bit to 0.
An ERI interrupt request can be canceled by reading 1 from the ORER, FER, or PER flag in the SSR register and then
setting the flag to 0, or setting the RIE bit to 0.
TIE Bit (Transmit Interrupt Enable)
Enables or disables TXI interrupt request.
A TXI interrupt request is disabled by setting the TIE bit to 0.
To Next Page
Loading...
