8 Trigger
8.4 Enables the hardware accelerated stepped FFT gating feature (Display only)
8.4 Enables the hardware accelerated stepped FFT gating feature
(Display only)
Enables or disables the hardware-accelerated stepped FFT gating feature:
–
Enabling the Hardware Acceleration feature means that the Stepped FFT
algorithm will run on the FPGA for configurations where speed improvements
are possible
–
Disabling the hardware-accelerated stepped FFT gating means the Stepped FFT
software algorithm will always run on the CPU instead of the FPGA
When enabled it is only used when applicable and determined by the current sweep
configuration.
The default value is ON and its value is power-on persistent.
Remote Command
[:SENSe]:SWEep:EGATe:HACCelerate:ENABle OFF | ON | 0 | 1
Example
:SWEep:EGATe:HACCelerate:ENABle ON
Notes Value ON means the hardware accelerated stepped FFT gating is used intelligently
Value OFF means the hardware accelerated stepped FFT gating is always disabled
Dependencies Only valid in ACP, CHP and SEM mesurements
State Saved Saved in instrument state
2379 Short Range Comms & IoT Mode User's &Programmer's Reference