11.6.3.1 Entry to Software Standby Mode .................................................................................... 245
11.6.3.2 Exit from Software Standby Mode .................................................................................. 246
11.6.3.3 Example of Software Standby Mode Application ........................................................... 247
11.7 Usage Notes ....................................................................................................................................... 248
11.7.1 I/O Port States ........................................................................................................................... 248
11.7.2 Module Stop State of DMAC and DTC ................................................................................... 248
11.7.3 On-Chip Peripheral Module Interrupts ..................................................................................... 248
11.7.4 Write Access to MSTPCRA, MSTPCRB, MSTPCRC, and MSTPCRD ................................. 248
11.7.5 Timing of WAIT Instructions ................................................................................................... 248
11.7.6 Rewrite the Register by DMAC and DTC in Sleep Mode ....................................................... 248
12. Battery Backup Function .............................................................................................................. 249
12.1 Overview ........................................................................................................................................... 249
12.2 Register Descriptions ......................................................................................................................... 250
12.2.1 VBATT Control Register (VBATTCR) ................................................................................... 250
12.2.2 VBATT Status Register (VBATTSR) ...................................................................................... 251
12.2.3 VBATT Pin Voltage Drop Detection Interrupt Control Register (VBTLVDICR) .................. 252
12.3 Operation ........................................................................................................................................... 253
12.3.1 Battery Backup Function .......................................................................................................... 253
12.3.2 VBATT Pin Voltage Monitoring Function .............................................................................. 254
12.4 Usage Notes ....................................................................................................................................... 255
13. Register Write Protection Function .............................................................................................. 256
13.1 Register Descriptions ......................................................................................................................... 257
13.1.1 Protect Register (PRCR) ........................................................................................................... 257
14. Exception Handling ...................................................................................................................... 258
14.1 Exception Events ............................................................................................................................... 258
14.1.1 Undefined Instruction Exception .............................................................................................. 259
14.1.2 Privileged Instruction Exception .............................................................................................. 259
14.1.3 Access Exceptions .................................................................................................................... 259
14.1.4 Floating-Point Exception .......................................................................................................... 259
14.1.5 Reset ......................................................................................................................................... 259
14.1.6 Non-Maskable Interrupt ........................................................................................................... 259
14.1.7 Interrupt .................................................................................................................................... 259
14.
1.8 Unconditional Trap ................................................................................................................... 259
14.2 Exception Handling Procedure .......................................................................................................... 260
14.3 Acceptance of Exception Events ....................................................................................................... 262
14.3.1 Acceptance Timing and Saved PC Value ................................................................................. 262
14.3.2 Vector and Site for Saving the Values in the PC and PSW ...................................................... 263
14.4 Hardware Processing for Accepting and Returning from Exceptions ............................................... 264
14.5 Hardware Pre-Processing .................................................................................................................. 265
14.5.1 Undefined Instruction Exception .............................................................................................. 265
14.5.2 Privileged Instruction Exception .............................................................................................. 265
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