Renesas RX Series User Manual

R01UH0823EJ0100 Rev.1.00 Page 1594 of 1823
Jul 31, 2019
RX23W Group 44. 12-Bit A/D Converter (S12ADE)
Figure 44.13 Flow of Setting the ADGSPCR.PGS Bit
Set the ADGSPCR.PGS bit to 1
Start
Is the ADCSR.ADST bit set to 0 (A/D conversion stop
state)?
No
Yes
To disable trigger input, set the ADSTRGR register to 3F3Fh
(set the TRSA[5:0] bits and the TRSB[5:0] bits to 3Fh and
3Fh, respectively)
Are the ADCSR.ADCS[1:0] bits set to 01b
(group scan mode)?
No
Yes
Are the ADCSR.ADCS[1:0] bits set to 10b
(continuous scan mode)?
Set the ADCSR.ADST bit to 0 (A/D conversion stop state)
To disable trigger input, set the ADSTRGR.TRSB[5:0] bits to 3Fh
No
Yes
End
Set the ADCSR.ADCS[1:0] bits to 01b (group scan mode)
To disable trigger input, set the ADSTRGR.TRSA[5:0] bits to 3Fh

Renesas RX Series Specifications

General

Brand	Renesas
Model	RX Series
Category	Microcontrollers
Language	English