Renesas RX Series User Manual

R01UH0823EJ0100 Rev.1.00 Page 1600 of 1823
Jul 31, 2019
RX23W Group 44. 12-Bit A/D Converter (S12ADE)
The following is an example of operation under group-A priority control in which channel 0 is selected for group A and
channels 1 to 3 are selected for group B (ADGSPCR.GBRSCN = 0, ADGSPCR.GBRP = 0).
(1) When input of a trigger for group B sets the ADCSR.ADST bit to 1 (A/D conversion start), conversion for the ANn
channels selected in the ADANSB0 and ADANSB1 registers, starting from the channel with the smallest number n.
(2) On completion of A/D conversion on a single channel, the result is stored in the corresponding A/D data register
(ADDRy).
(3) If a group A trigger is input during A/D conversion on group B, the ADCSR.ADST bit is cleared to 0 and the
ongoing A/D conversion on group B is stopped. After that, the ADCSR.ADST bit is set to 1 (A/D conversion start)
and conversion for the ANn channels selected in the ADANSA0 and ADANSA1 registers, starting from the channel
with the smallest number n.
(4) On completion of A/D conversion on a single channel, the result is stored in the corresponding A/D data register
(ADDRy).
(5) An S12ADI0 interrupt request is generated if the setting of the ADCSR.ADIE bit is 1 (S12ADI0 interrupt upon
scanning completion enabled).
(6) The ADCSR.ADST bit retains the value 1 (A/D conversion start) during A/D conversion and is cleared on
completion of conversion, after which the A/D converter enters a wait state.
Figure 44.17 Example of Operation under Group-A Priority Control (4)
(when ADGSPCR.GBRSCN = 0 and ADGSPCR.GBRP = 0)
Channel 1 (AN001) Waiting for conversion
Channel 2 (AN002) Waiting for conversion
Channel 3 (AN003) Waiting for conversion
ADDR1
ADDR2
ADDR3
A/D conversion B1
A/D conversion B2
Waiting for conversion
Waiting for conversion
A/D conversion B3*
1
A/D conversion result B1
A/D conversion result B2
(2)
Stored
Waiting for conversion
ADST
A/D
conversion
started
Waiting for conversion
ADDR0 A/D conversion result A1
Interrupt generated
A/D conversion A1
Channel 0 (AN000)
Trigger for group B
Trigger for group A
Group A
Group B
Waiting for conversion
GBADI
(2)
Stored
(3)
(1)
(6)
(4)
Stored
(5)
Note 1. The converted data of A/D conversion B3 is ignored.
S12ADI0

Renesas RX Series Specifications

General

Core	RXv1, RXv2, RXv3
Flash Memory	Up to 8 MB
RAM	Up to 1 MB
Operating Voltage	1.62V to 5.5V
Operating Temperature	-40°C to +85°C or +105°C
Package	BGA, LQFP
ADC Resolution	12-bit
DAC Resolution	12-bit
Communication Interfaces	SCI, SPI, I2C, USB, Ethernet, CAN
Architecture	32-bit
Security Features	Memory Protection Unit (MPU)