Renesas RX Series

23.2.2 Timer Mode Register (TMDR) ................................................................................................. 479
23.2.3 Timer I/O Control Register (TIOR) .......................................................................................... 481
23.2.4 Timer Interrupt Enable Register (TIER) .................................................................................. 491
23.2.5 Timer Status Register (TSR) .................................................................................................... 493
23.2.6 Timer Buffer Operation Transfer Mode Register (TBTM) ...................................................... 494
23.2.7 Timer Input Capture Control Register (TICCR) ...................................................................... 495
23.2.8 Timer A/D Converter Start Request Control Register (TADCR) ............................................ 496
23.2.9 Timer A/D Converter Start Request Cycle Set Registers A and B
(TADCORA and TADCORB) ................................................................................................. 497
23.2.10 Timer A/D Converter Start Request Cycle Set Buffer Registers A and B
(TADCOBRA and TADCOBRB) ............................................................................................ 498
23.2.11 Timer Counter (TCNT) ............................................................................................................ 498
23.2.12 Timer General Register (TGR) ................................................................................................. 499
23.2.13 Timer Start Registers (TSTR) ................................................................................................... 500
23.2.14 Timer Synchronous Registers (TSYR) ..................................................................................... 501
23.2.15 Timer Read/Write Enable Registers (TRWER) ....................................................................... 502
23.2.16 Timer Output Master Enable Registers (TOER) ...................................................................... 503
23.2.17 Timer Output Control Registers 1 (TOCR1) ............................................................................ 504
23.2.18 Timer Output Control Registers 2 (TOCR2) ............................................................................ 506
23.2.19 Timer Output Level Buffer Registers (TOLBR) ...................................................................... 508
23.2.20 Timer Gate Control Registers (TGCR) .................................................................................... 509
23.2.21 Timer Subcounters (TCNTS) ................................................................................................... 510
23.2.22 Timer Dead Time Data Registers (TDDR) ............................................................................... 510
23.2.23 Timer Cycle Data Registers (TCDR) ....................................................................................... 511
23.2.24 Timer Cycle Buffer Registers (TCBR) ..................................................................................... 511
23.2.25 Timer Interrupt Skipping Set Registers (TITCR) ..................................................................... 512
23.2.26 Timer Interrupt Skipping Counters (TITCNT) ......................................................................... 513
23.2.27 Timer Buffer Transfer Set Registers (TBTER) ........................................................................ 514
23.2.28 Timer Dead Time Enable Registers (TDER) ........................................................................... 515
23.2.29 Timer Waveform Control Registers (TWCR) .......................................................................... 516
23.2.30 Noise Filter Control Registers (NFCR) .................................................................................... 517
23.2.31 Bus Master Interface ...................................
................................................................
.............. 518
23.3 Operation ........................................................................................................................................... 519
23.3.1 Basic Functions ......................................................................................................................... 519
23.3.2 Synchronous Operation ............................................................................................................ 525
23.3.3 Buffer Operation ....................................................................................................................... 527
23.3.4 Cascaded Operation .................................................................................................................. 531
23.3.5 PWM Modes ............................................................................................................................. 536
23.3.6 Phase Counting Mode ............................................................................................................... 540
23.3.7 Reset-Synchronized PWM Mode ............................................................................................. 546
23.3.8 Complementary PWM Mode .................................................................................................... 549
23.3.9 A/D Converter Start Request Delaying Function ..................................................................... 580