40.3.6.9 IO_RW_EXTENDED (CMD53 Multi-Block Write) ................................................... 1465
40.3.6.10 DMA Transfer ............................................................................................................... 1467
40.4 Interrupts .......................................................................................................................................... 1469
40.4.1 DMA Transfer Triggered by Interrupt Requests .................................................................... 1470
40.5 Notes on Using the SDHI ................................................................................................................ 1471
40.5.1 Illegal Read Access During a Multi-Block Read and How To Avoid It ................................ 1471
40.5.2 SDBUFR Register Illegal Write Error .................................................................................... 1471
40.5.3 Automatic Control of the SDHI Clock Output ....................................................................... 1472
40.5.4 Restrictions on Setting the C52PUB Bit During a Multi-Block Write Sequence .................. 1472
40.5.5 Note on Setting the SDCLKCR Register ............................................................................... 1472
40.5.6 Writing to the SDSTOP Register During a Multi-Block Read Sequence .............................. 1472
40.5.7 Controlling Module Operation ............................................................................................... 1472
41. Bluetooth Low Energy (BLE) ...................................................................................................... 1473
41.1 Overview ......................................................................................................................................... 1473
41.2 Operation ......................................................................................................................................... 1476
41.2.1 State Transitions ..................................................................................................................... 1476
41.3 Interrupts .......................................................................................................................................... 1477
41.4 Usage Notes ..................................................................................................................................... 1478
41.4.1 RF Transceiver Power-Supply ................................................................................................ 1478
41.4.2 Wireless Standards ................................................................................................................. 1479
41.4.3 Notes on Board Design ........................................................................................................... 1479
42. Trusted Secure IP (TSIP-Lite) .................................................................................................... 1480
42.1 Overview ......................................................................................................................................... 1480
42.2 Operation ......................................................................................................................................... 1482
42.2.1 Operating Modes and State Transitions .................................................................................. 1482
42.
2.2 Encryption Engine .................................................................................................................. 1483
42.2.3 Key Installation ....................................................................................................................... 1484
42.2.4 Encryption and Decryption ..................................................................................................... 1485
42.2.5 Generating Key Generation Information (by Using Random Numbers) ............................... 1488
42.2.6 Random Number Generation .................................................................................................. 1488
42.3 Interrupt ........................................................................................................................................... 1489
42.4 Usage Notes ..................................................................................................................................... 1489
42.4.1 Standby Mode ......................................................................................................................... 1489
42.4.2 Setting the Module Stop Function .......................................................................................... 1489
42.4.3 TSIP-Lite Library ................................................................................................................... 1489
43. Capacitive Touch Sensing Unit (CTSU) ..................................................................................... 1490
43.1 Overview ......................................................................................................................................... 1491
43.2 Register Descriptions ....................................................................................................................... 1492
43.2.1 CTSU Control Register 0 (CTSUCR0) .................................................................................. 1492
43.2.2 CTSU Control Register 1 (CTSUCR1) .................................................................................. 1494
43.2.3 CTSU Synchronous Noise Reduction Setting Register (CTSUSDPRS) ................................ 1495
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