43.2.4 CTSU Sensor Stabilization Wait Control Register (CTSUSST) ............................................ 1496
43.2.5 CTSU Measurement Channel Register 0 (CTSUMCH0) ....................................................... 1497
43.2.6 CTSU Measurement Channel Register 1 (CTSUMCH1) ....................................................... 1498
43.2.7 CTSU Channel Enable Control Register n (CTSUCHACn) (n = 0 to 3) ............................... 1499
43.2.8 CTSU Channel Enable Control Register 4 (CTSUCHAC4) .................................................. 1500
43.2.9 CTSU Channel Transmit/Receive Control Register n (CTSUCHTRCn) (n = 0 to 3) ........... 1501
43.2.10 CTSU Channel Transmit/Receive Control Register 4 (CTSUCHTRC4) .............................. 1502
43.2.11 CTSU High-Pass Noise Reduction Control Register (CTSUDCLKC) .................................. 1503
43.2.12 CTSU Status Register (CTSUST) .......................................................................................... 1504
43.2.13 CTSU High-Pass Noise Reduction Spectrum Diffusion Control Register (CTSUSSC) ........ 1506
43.2.14 CTSU Sensor Offset Register 0 (CTSUSO0) ......................................................................... 1507
43.2.15 CTSU Sensor Offset Register 1 (CTSUSO1) ......................................................................... 1508
43.2.16 CTSU Sensor Counter (CTSUSC) ......................................................................................... 1509
43.2.17 CTSU Reference Counter (CTSURC) .................................................................................... 1510
43.2.18 CTSU Error Status Register (CTSUERRS) ............................................................................ 1511
43.3 Operation ......................................................................................................................................... 1513
43.3.1 Principles of Measurement Operation .................................................................................... 1513
43.3.2 Measurement Modes ............................................................................................................... 1515
43.3.2.1 Initial Setting Flowchart ................................................................................................ 1516
43.3.2.2 Status Counter ............................................................................................................... 1517
43.3.2.3 Self-Capacitance Single Scan Mode Operation ............................................................ 1518
43.3.2.4 Self-Capacitance Multi-Scan Mode Operation ............................................................. 1520
43.3.2.5 Mutual Capacitance Full Scan Mode Operation ...........................................................
1522
43.3.3 Items Common to Multiple Modes ......................................................................................... 1525
43.3.3.1 Sensor Stabilization Wait Time and Measurement Time .............................................. 1525
43.3.3.2 Interrupts ........................................................................................................................ 1526
43.4 Usage Notes ..................................................................................................................................... 1528
43.4.1 Measurement Result Data (CTSUSC and CTSURC Counters) ............................................. 1528
43.4.2 Software Trigger ..................................................................................................................... 1528
43.4.3 External Trigger ...................................................................................................................... 1528
43.4.4 Notes on Forcibly Stopping Operation ................................................................................... 1529
43.4.5 TSCAP Pin ............................................................................................................................. 1529
43.4.6 Notes during Measurement Operation (CTSUCR0.CTSUSTRT Bit = 1) ............................. 1529
44. 12-Bit A/D Converter (S12ADE) ................................................................................................. 1530
44.1 Overview ......................................................................................................................................... 1530
44.2 Register Descriptions ....................................................................................................................... 1535
44.2.1 A/D Data Registers y (ADDRy) (y = 0 to 7, 16 to 20, 27),
A/D Data Duplication Register (ADDBLDR),
A/D Temperature Sensor Data Register (ADTSDR),
A/D Internal Reference Voltage Data Register (ADOCDR) .................................................. 1535
44.2.2 A/D Self-Diagnosis Data Register (ADRD) ........................................................................... 1537
44.2.3 A/D Control Register (ADCSR) ............................................................................................. 1538
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