Renesas RX Series

44.2.4 A/D Channel Select Register A0 (ADANSA0) ...................................................................... 1541
44.2.5 A/D Channel Select Register A1 (ADANSA1) ...................................................................... 1542
44.2.6 A/D Channel Select Register B0 (ADANSB0) ...................................................................... 1543
44.2.7 A/D Channel Select Register B1 (ADANSB1) ...................................................................... 1544
44.2.8 A/D-Converted Value Addition/Average Function Select Register 0 (ADADS0) ................ 1545
44.2.9 A/D-Converted Value Addition/Average Function Select Register 1 (ADADS1) ................ 1546
44.2.10 A/D-Converted Value Addition/Average Count Select Register (ADADC) ......................... 1548
44.2.11 A/D Control Extended Register (ADCER) ............................................................................ 1549
44.2.12 A/D Conversion Start Trigger Select Register (ADSTRGR) ................................................. 1551
44.2.13 A/D Conversion Extended Input Control Register (ADEXICR) ........................................... 1553
44.2.14 A/D Sampling State Register n (ADSSTRn) (n = 0 to 7, L, T, O) ......................................... 1555
44.2.15 A/D Disconnection Detection Control Register (ADDISCR) ................................................ 1556
44.2.16 A/D Event Link Control Register (ADELCCR) ..................................................................... 1557
44.2.17 A/D Group Scan Priority Control Register (ADGSPCR) ...................................................... 1558
44.2.18 A/D Compare Function Control Register (ADCMPCR) ........................................................ 1559
44.2.19 A/D Compare Function Window A Channel Select Register 0 (ADCMPANSR0) ............... 1561
44.2.20 A/D Compare Function Window A Channel Select Register 1 (ADCMPANSR1) ............... 1562
44.2.21 A/D Compare Function Window A Extended Input Select Register (ADCMPANSER) ...... 1563
44.2.22 A/D Compare Function Window A Comparison Condition Setting Register 0
(ADCMPLR0) ........................................................................................................................ 1564
44.2.23 A/D Compare Function Window A Comparison Condition Setting Register 1
(ADCMPLR1) ........................................................................................................................ 1565
44.2.24 A/D Compare Function Window A Extended Input Comparison
Condition Setting Register
(ADCM
PLER) ........................................................................................................................ 1566
44.2.25 A/D Compare Function Window A Lower-Side Level Setting Register (ADCMPDR0) ...... 1567
44.2.26 A/D Compare Function Window A Upper-Side Level Setting Register (ADCMPDR1) ...... 1569
44.2.27 A/D Compare Function Window A Channel Status Register 0 (ADCMPSR0) ..................... 1570
44.2.28 A/D Compare Function Window A Channel Status Register 1 (ADCMPSR1) ..................... 1571
44.2.29 A/D Compare Function Window A Extended Input Channel Status Register
(ADCMPSER) ........................................................................................................................ 1572
44.2.30 A/D High-Potential/Low-Potential Reference Voltage Control Register
(ADHVREFCNT) ................................................................................................................... 1573
44.2.31 A/D Compare Function Window A/B Status Monitor Register (ADWINMON) .................. 1574
44.2.32 A/D Compare Function Window B Channel Select Register (ADCMPBNSR) .................... 1575
44.2.33 A/D Compare Function Window B Lower-Side Level Setting Register (ADWINLLB) ...... 1577
44.2.34 A/D Compare Function Window B Upper-Side Level Setting Register (ADWINULB) ...... 1579
44.2.35 A/D Compare Function Window B Channel Status Register (ADCMPBSR) ....................... 1580
44.2.36 A/D Data Storage Buffer Register n (ADBUFn) (n = 0 to 15) .............................................. 1581
44.2.37 A/D Data Storage Buffer Enable Register (ADBUFEN) ....................................................... 1582
44.2.38 A/D Data Storage Buffer Pointer Register (ADBUFPTR) ..................................................... 1583
44.3 Operation ......................................................................................................................................... 1584
44.3.1 Scanning Operation ................................................................................................................ 1584