Renesas RX Series User Manual

R01UH0823EJ0100 Rev.1.00 Page 426 of 1823
Jul 31, 2019
RX23W Group 20. Event Link Controller (ELC)
(5) Input Port Group Operation When Event Signal is Input
When an event signal is input to an input port group, the level of the corresponding pins is transferred to the PDBFn
register. Values of the bits corresponding to ports that are not specified as members of the input port group do not change.
An example of operation is shown in
Figure 20.4.
Figure 20.4 Event Linkage Related to Input Port Groups (Port B)
(6) Output Port Group Operation When Event Signal is Input
When an event signal is input to an output port group, the value of the corresponding PODR register changes according
to a setting of the PGCn.PGCO[2:0] bits (n = 1, 2). An example of operation is shown in
Figure 20.5.
Figure 20.5 Event Linkage Related to Output Port Groups (Port B)
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
00000000bPDBF1 register 00001010b
Specified as an
input port group
Event signal
transferred
PB3
PB2
PB1
PB0
xxxx0000b
PDBF1 register
PORTB.PODR register xxxx1010b
Event signal
00001010b
Specified as an
output port group
transferred

Renesas RX Series Specifications

General

Core	RXv1, RXv2, RXv3
Flash Memory	Up to 8 MB
RAM	Up to 1 MB
Operating Voltage	1.62V to 5.5V
Operating Temperature	-40°C to +85°C or +105°C
Package	BGA, LQFP
ADC Resolution	12-bit
DAC Resolution	12-bit
Communication Interfaces	SCI, SPI, I2C, USB, Ethernet, CAN
Architecture	32-bit
Security Features	Memory Protection Unit (MPU)