Renesas RX Series User Manual

R01UH0823EJ0100 Rev.1.00 Page 963 of 1823
Jul 31, 2019
RX23W Group 33. Serial Communications Interface (SCIg, SCIh)
Note 1. In simple I
2
C mode, only MSB first is available.
Clock synchronous
mode
Data length 8 bits
Receive error detection Overrun error
Hardware flow control CTSn# and RTSn# pins can be used in controlling transmission/reception.
Smart card interface
mode
Error processing An error signal can be automatically transmitted when detecting a parity error during
reception
Data can be automatically retransmitted when receiving an error signal during
transmission
Data type Both direct convention and inverse convention are supported.
Simple I
2
C mode Transfer format I
2
C-bus format
Operating mode Master (single-master operation only)
Transfer rate Fast mode is supported (refer to section 33.2.11, Bit Rate Register (BRR) to set the
transfer rate).
Noise cancellation The signal paths from input on the SSCLn and SSDAn pins incorporate digital noise
filters, and the interval for noise cancellation is adjustable.
Simple SPI bus Data length 8 bits
Detection of errors Overrun error
SS input pin function Applying the high level to the SSn# pin can cause the output pins to enter the
high-impedance state.
Clock settings Four kinds of settings for clock phase and clock polarity are selectable.
Bit rate modulation function Correction of outputs from the on-chip baud rate generator can reduce errors.
Event link function (supported by SCI5 only) Error (receive error or error signal detection) event output
Receive data full event output
Transmit data empty event output
Transmit end event output
Table 33.2 SCIh Specifications (1/2)
Item Description
Serial communication modes  Asynchronous
 Clock synchronous
 Smart card interface
 Simple I
2
C-bus
 Simple SPI bus
Transfer speed Bit rate specifiable with the on-chip baud rate generator.
Full-duplex communications Transmitter: Continuous transmission possible using double-buffer structure.
Receiver: Continuous reception possible using double-buffer structure.
I/O pins Refer to Table 33.4 to Table 33.7.
Data transfer Selectable as LSB first or MSB first transfer*
1
Interrupt sources Transmit end, transmit data empty, receive data full, and receive error
Completion of generation of a start condition, restart condition, or stop condition (for simple
I
2
C mode)
Low power consumption function Module stop state can be set.
Table 33.1 SCIg Specifications (2/2)
Item Description

Renesas RX Series Specifications

General

Brand	Renesas
Model	RX Series
Category	Microcontrollers
Language	English