Renesas RX Series User Manual

R01UH0823EJ0100 Rev.1.00 Page 1153 of 1823
Jul 31, 2019
RX23W Group 35. I
2
C-bus Interface (RIICa)
Figure 35.11 Example of Master Reception (7-Bit Address Format, 3 Bytes or More)
[3] Transmit the slave address followed by R and
check ACK.
No
Yes
[2] Check I
2
C-bus occupation and issue a start
condition.
Yes
Yes
Master reception
ICCR2.ST = 1
Initial settings
No
Yes
Write data to ICDRT register
Yes
No
ICSR2.NACKF = 0?
Yes
Perform dummy read of ICDRR
register
ICSR2.RDRF = 1?
Yes
Next data = Final byte - 1?
No
Read ICDRR register
Set ICMR3.ACKBT bit
Read ICDRR register
No
No
ICSR2.STOP = 0
ICCR2.SP = 1
Read ICDRR register
ICMR3.WAIT = 0
ICSR2.STOP = 0
ICCR2.SP = 1
Perform dummy read of ICDRR
register
ICSR2.STOP = 1?
No
End of master reception
ICSR2.NACKF = 0
ICSR2.STOP = 0
Yes
[1] Initial settings
[4] Perform dummy read.
[5] Read received data and prepare for receiving
final data.
[6] Set the acknowledgment and read data
of (final byte – 1 byte).
[7] Read final data and issue a stop
condition.
[8] Check stop condition issuance
[9] Processing for the next transfer operation
No
ICSR2.TDRE = 1?
ICSR2.RDRF = 1?
ICSR2.RDRF = 1?
ICCR2.BBSY = 0?
Next data = Final byte - 2?
ICMR3.WAIT = 1
No
Yes

Renesas RX Series Specifications

General

Brand	Renesas
Model	RX Series
Category	Microcontrollers
Language	English