R01UH0823EJ0100 Rev.1.00 Page 209 of 1823
Jul 31, 2019
RX23W Group 9. Clock Generation Circuit
When not using the sub-clock, perform initial settings according to the flowchart example in Figure 9.17.
Figure 9.17 Example of Initialization Flowchart When Sub-Clock is Not Used
Regardless of the RCR3.RTCEN bit setting, wait until the oscillator stabilization wait time elapses before rewriting
the SOSCCR.SOSTP bit to 0 (sub-clock oscillator is operating).
Since the sub-clock control circuit is in an unstable state after a cold start, it must be initialized regardless of
whether or not the sub-clock is in use. The sub-clock is initialized by setting the SOSCCR.SOSTP bit to 1 and the
RCR3.RTCEN bit to 0 (sub-clock oscillator is stopped). See
section 28.2.19, RTC Control Register 3 (RCR3),
for instructions to initialize the RCR3.RTCEN bit.
The RCR3.RTCDV[2:0] bits must also be set when operating the sub-clock oscillator. Set these bits while the
sub-clock oscillator is stopped. Do not rewrite these bits while the sub-clock oscillator is operating.
When successively rewriting the SOSCCR.SOSTP bit followed by the RCR3.RTCEN bit or vice versa, confirm that
the first bit rewrite was completed successfully before rewriting the second bit.
Start
Set the SOSCCR.SOSTP bit to 1 (sub-clock oscillator is stopped).
Read the SOSCCR.SOSTP bit and confirm that it is 1.
Set the RCR3.RTCEN bit to 0 (sub-clock oscillator is stopped).
Read the RCR3.RTCEN bit and confirm that it is 0.
*1
End
Sub-clock
oscillation state
Stopped
SOSCCR.
SOSTP
RCR3.
RTCEN
0
Undefined
0
1
Note 1. The values of bit 7 to bit 1 are undefined. Confirm only the value of the RCR3.RTCEN bit.
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