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Renesas RX Series User Manual

Renesas RX Series
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R01UH0823EJ0100 Rev.1.00 Page 658 of 1823
Jul 31, 2019
RX23W Group 25. 16-Bit Timer Pulse Unit (TPUa)
Note 1. TGRC and TGRD can be set as a buffer register.
Note 2. For details, see section 11, Low Power Consumption.
Table 25.2 TPU Functions
Item TPU0 TPU1 TPU2 TPU3 TPU4 TPU5
Count clocks PCLK/1
PCLK/4
PCLK/16
PCLK/64
TCLKA
TCLKB
TCLKC
TCLKD
PCLK/1
PCLK/4
PCLK/16
PCLK/64
PCLK/256
TCLKA
TCLKB
PCLK/1
PCLK/4
PCLK/16
PCLK/64
PCLK/1024
TCLKA
TCLKB
TCLKC
PCLK/1
PCLK/4
PCLK/16
PCLK/64
PCLK/256
PCLK/1024
PCLK/4096
TCLKA
PCLK/1
PCLK/4
PCLK/16
PCLK/64
PCLK/1024
TCLKA
TCLKC
PCLK/1
PCLK/4
PCLK/16
PCLK/64
PCLK/256
TCLKA
TCLKC
TCLKD
External clocks for
phase counting mode
Not possible TCLKA
TCLKB
TCLKC
TCLKD
Not possible TCLKC
TCLKD
TCLKA
TCLKB
Timer general registers TGRA
TGRB
TGRC*
1
TGRD*
1
TGRA
TGRB
TGRA
TGRB
TGRA
TGRB
TGRC*
1
TGRD*
1
TGRA
TGRB
TGRA
TGRB
I/O pins TIOCB0 TIOCB1 TIOCB2 TIOCA3
TIOCB3
TIOCC3
TIOCD3
TIOCA4
TIOCB4
TIOCB5
Counter clear function
(y = A to D)
TGRy compare
match or input
capture
TGRy compare
match or input
capture
TGRy compare
match or input
capture
TGRy compare
match or input
capture
TGRy compare
match or input
capture
TGRy compare
match or input
capture
Compare
match
output
Low output Possible Possible Possible Possible Possible Possible
High output Possible Possible Possible Possible Possible Possible
Toggle
output
Possible Possible Possible Possible Possible Possible
Input capture function Possible Possible Possible Possible Possible Possible
Synchronous operation Possible Possible Possible Possible Possible Possible
PWM mode Possible Possible Possible Possible Possible Possible
Phase counting mode Not possible Possible Possible Not possible Possible Possible
Buffer operation Possible Not possible Not possible Possible Not possible Not possible
DTC activation
(y = A to D)
TGRy compare
match or input
capture
TGRy compare
match or input
capture
TGRy compare
match or input
capture
TGRy compare
match or input
capture
TGRy compare
match or input
capture
TGRy compare
match or input
capture
DMAC activation TGRA compare
match
TGRA compare
match
TGRA compare
match
TGRA compare
match or input
capture
TGRA compare
match or input
capture
TGRA compare
match
A/D conversion start
trigger
TGRA compare
match
TGRA compare
match
TGRA compare
match
TGRA compare
match or input
capture
TGRA compare
match or input
capture
Not possible
Interrupt sources 5 sources
ï‚· Compare
match 0A
ï‚· Compare
match or input
capture 0B
ï‚· Compare
match 0C
ï‚· Compare
match 0D
ï‚· Overflow
4 sources
ï‚· Compare
match 1A
ï‚· Compare
match or input
capture 1B
ï‚· Overflow
ï‚· Underflow
4 sources
ï‚· Compare
match 2A
ï‚· Compare
match or input
capture 2B
ï‚· Overflow
ï‚· Underflow
5 sources
ï‚· Compare
match or input
capture 3A
ï‚· Compare
match or input
capture 3B
ï‚· Compare
match or input
capture 3C
ï‚· Compare
match or input
capture 3D
ï‚· Overflow
4 sources
ï‚· Compare
match or input
capture 4A
ï‚· Compare
match or input
capture 4B
ï‚· Overflow
ï‚· Underflow
4 sources
ï‚· Compare
match 5A
ï‚· Compare
match or input
capture 5B
ï‚· Overflow
ï‚· Underflow
Module stop setting*
2
MSTPCRA.MSTPA13 bit

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Renesas RX Series Specifications

General IconGeneral
BrandRenesas
ModelRX Series
CategoryMicrocontrollers
LanguageEnglish

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