Renesas RX Series

R01UH0823EJ0100 Rev.1.00 Page 663 of 1823
Jul 31, 2019
RX23W Group 25. 16-Bit Timer Pulse Unit (TPUa)
Note: This setting is invalid when TPU4 is in phase counting mode.
Note: This setting is invalid when TPU5 is in phase counting mode.
Table 25.7 Bits TPSC[2:0] (TPU3)
Channel
Bits TPSC[2:0]
Descriptionb2 b1 b0
TPU3 0 0 0 Internal clock: counts on PCLK/1
0 0 1 Internal clock: counts on PCLK/4
0 1 0 Internal clock: counts on PCLK/16
0 1 1 Internal clock: counts on PCLK/64
1 0 0 External clock: counts on TCLKA pin input
1 0 1 Internal clock: counts on PCLK/1024
1 1 0 Internal clock: counts on PCLK/256
1 1 1 Internal clock: counts on PCLK/4096
Table 25.8 Bits TPSC[2:0] (TPU4)
Channel
Bits TPSC[2:0]
Descriptionb2 b1 b0
TPU4 0 0 0 Internal clock: counts on PCLK/1
0 0 1 Internal clock: counts on PCLK/4
0 1 0 Internal clock: counts on PCLK/16
0 1 1 Internal clock: counts on PCLK/64
1 0 0 External clock: counts on TCLKA pin input
1 0 1 External clock: counts on TCLKC pin input
1 1 0 Internal clock: counts on PCLK/1024
1 1 1 Counts on TPU5.TCNT overflow/underflow
Table 25.9 Bits TPSC[2:0] (TPU5)
Channel
Bits TPSC[2:0]
Descriptionb2 b1 b0
TPU5 0 0 0 Internal clock: counts on PCLK/1
0 0 1 Internal clock: counts on PCLK/4
0 1 0 Internal clock: counts on PCLK/16
0 1 1 Internal clock: counts on PCLK/64
1 0 0 External clock: counts on TCLKA pin input
1 0 1 External clock: counts on TCLKC pin input
1 1 0 Internal clock: counts on PCLK/256
1 1 1 External clock: counts on TCLKD pin input