UART Registers
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SWRU543–January 2019
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Universal Asynchronous Receivers/Transmitters (UARTs)
Table 6-4. UARTRSR_UARTECR Register Field Descriptions (continued)
Bit Field Type Reset Description
1 PE_OR_DATA R/W 0h
UART Parity Error (R) or Error Clear (W)
This bit is cleared to 0 by a write to UARTECR.
0h (R) = No parity error has occurred
1h (R) = The parity of the received data character does not match
the parity defined by bits 2 and 7 of the UARTLCRH register.
0 FE_OR_DATA R/W 0h
UART Framing Error (R) or Error Clear (W)
This bit is cleared to 0 by a write to UARTECR.
0h (R) = No framing error has occurred
1h (R) = The received character does not have a valid stop bit (a
valid stop bit is 1).
In FIFO mode, this error is associated with the character at the top of
the FIFO.
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