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Texas Instruments CC3235 SimpleLink Series - SHAMD5_MODE Register Field Descriptions

Texas Instruments CC3235 SimpleLink Series
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SHA-MD5 Registers
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726
SWRU543January 2019
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Copyright © 2019, Texas Instruments Incorporated
SHA/MD5 Accelerator
Table 19-29. SHAMD5_MODE Register Field Descriptions (continued)
Bit Field Type Reset Description
3 ALGO_CONSTANT R/W 0h
The initial digest register is overwritten with the algorithm constants
for the selected algorithm when hashing, and the initial digest count
register is reset to 0. This starts a normal hash operation. When
continuing an existing hash or when performing an HMAC operation,
this register must be set to 0 and the intermediate/inner digest or
HMAC key and digest count must be written to the context input
registers before writing SHAMD5_MODE. Auto-cleared internally
after first block processed.
0h = Use pre-calculated digest (from another operation)
1h = Use constants of the selected algo.
2-1 ALGO R/W 0h
These bits select the hash algorithm to be used for processing.
0h = md5_128 algorithm
1h = sha1_160 algorithm
2h = sha2_224 algorithm
3h = sha2_256 algorithm
0 RESERVED R X

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