Peripheral Library APIs for I2S Configuration
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SWRU543–January 2019
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Inter-Integrated Sound (I2S) Multichannel Audio Serial Port
12.4.3.8 Values that can be Passed to I2SIntClear() as the ulStatFlags Parameter and Returned from
I2SIntStatus()
Table 12-2 lists the values that can be passed to I2SIntClear() as the ulStatFlags parameter and
returned from I2SIntStatus().
Table 12-2. ulStatFlags Parameter
Tag Value Description
I2S_STS_XERR 0x00000100 The XERR bit always returns a logic-OR of: XUNDRN |
XSYNCERR | XCKFAIL | XDMAERR
I2S_STS_XDMAERR 0x00000080 Transmit DMA error flag. XDMAERR is set when the
CPU or DMA writes more serializers through the data
port in a given time slot than were programmed as
transmitters.
I2S_STS_XSTAFRM 0x00000040 Transmit start of frame flag
I2S_STS_XDATA 0x00000020 Transmit data ready flag. 1 indicates that data is copied
from TX buffer to shift register. TX buffer is EMPTY and
ready to be written. 0 indicates TX buffer is FULL.
I2S_STS_XLAST 0x00000010 Transmit last slot flag. XLAST is set along with XDATA, if
the current slot is the last slot in a frame.
I2S_STS_XSYNCERR 0x00000002 Unexpected transmit frame-sync flag. XSYNCERR is set
when a new transmit frame-sync (AFSX) occurs before it
is expected.
I2S_STS_XUNDRN 0x00000001 Transmitter underrun flag. XUNDRN is set when the
transmit serializer is instructed to transfer data from TX
buffer, but TX buffer has not yet been serviced with new
data since the last transfer.
I2S_STS_XDMA 0x80000000
I2S_STS_RERR 0x01000000 The RERR bit always returns a logic-OR of: ROVRN |
RSYNCERR | RCKFAIL | RDMAERR. Allows a single bit
to be checked to determine if a receiver error interrupt
has occurred.
I2S_STS_RDMAERR 0x00800000 Receive DMA error. Receive DMA error flag. RDMAERR
is set when the CPU or DMA reads more serializers
through the data port in a given time slot than were
programmed as receivers.
I2S_STS_RSTAFRM 0x00400000 Receive start of frame flag. Indicates a new receive
frame-sync is detected.
I2S_STS_RDATA 0x00200000 Receive data ready flag. Indicates data is transferred
from shift register to RX buffer and ready to be serviced
by the CPU or DMA. When RDATA is set, it always
causes a DMA event.
I2S_STS_RLAST 0x00100000 Receive last slot flag. RLAST is set with RDATA, if the
current slot is the last slot in a frame.
I2S_STS_RSYNCERR 0x00020000 Unexpected receive frame-sync. Unexpected receive
frame-sync flag. RSYNCERR is set when a new receive
frame-sync occurs before it is expected.
I2S_STS_ROVERN 0x00010000 Receive clock failure. Receiver overrun flag. ROVRN is
set when the receive serializer is instructed to transfer
data from XRSR to RBUF, but the former data in RBUF
has not yet been read by the CPU or DMA.
I2S_STS_RDMA 0x40000000
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