SD-HOST Registers
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SWRU543–January 2019
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SD Host Controller Interface
11.7.12 MMCHS_HCTL Register (Offset = 228h) [reset = 0h]
Control register
MMCHS_HCTL is shown in Figure 11-13 and described in Table 11-16.
Return to Summary Table.
This register defines the host controls to set power, wakeup, and transfer parameters.
MMCi.MMCHS_HCTL[31:24] = Wakeup control
MMCi.MMCHS_HCTL[23:16] = Block gap control
MMCi.MMCHS_HCTL[15:8] = Power control
MMCi.MMCHS_HCTL[7:0] = Host control
Figure 11-13. MMCHS_HCTL Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RESERVED
R-0h
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESERVED SDVS RESERVED
R-0h R/W-0h R-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 11-16. MMCHS_HCTL Register Field Descriptions
Bit Field Type Reset Description
31-12 RESERVED R 0h
11-9 SDVS R/W 0h
SD bus voltage select (all cards)
The host driver should set these bits to select the voltage level for
the card, according to the voltage supported by the system
(MMCi.MMCHS_CAPA[26] VS18 bit, MMCi.MMCHS_CAPA[25]
VS30 bit, MMCi.MMCHS_CAPA[24] VS33 bit) before starting a
transfer.
5h = 1.8 V (typical)
6h = 3.0 V (typical)
7h = 3.3 V (typical)
MMCHS2: This field must be set to 0x5
MMCHS3: This field must be set to 0x5
8-0 RESERVED R 0h
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