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Developer’s Guide
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SWRU543–January 2019
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Parallel Camera Interface Module
14.8 Developer’s Guide
14.8.1 Using Peripheral Driver APIs for Capturing an Image
1. Configure and enable the clock for the camera peripheral. Peripherals are clock-gated by default, and
generate a bus fault if accessed without enabling the clock. The peripheral is ready to use after the
software reset:
MAP_PRCMPeripheralClkEnable(PRCM_CAMERA, PRCM_RUN_MODE_CLK);
MAP_PRCMPeripheralReset(PRCM_CAMERA);
2. Set the camera parameters by using the peripheral driver API CameraParamsConfig. This function
sets the appropriate bits in the CAMERA_O_CC_CTRL register for controlling the various parameters
of the camera control block. The parameters follow:
• ulHSPol: Sets the polarity of the horizontal synchronization signal (CAM_P_HS). It can be either
CAM_HS_POL_HI or CAM_HS_POL_LO.
• ulHSPol: Sets the polarity of the vertical synchronization signal (CAM_P_VS). It can be either
CAM_VS_POL_HI or CAM_VS_POL_LO.
• ulFlags:
– Should be set to (CAM_ORDERCAM_SWAP | CAM_NOBT_SYNCHRO) for starting
acquisition/capture when CAM_P_VS goes from low to high with swapping the image data in
FIFO. For details, see Section 14.3.1.
– Should be set to CAM_NOBT_SYNCHRO for starting acquisition/capture when CAM_P_VS
goes from low to high without swapping the image data in FIFO.
For high-frequency operations, set CAM_IF_SYNCHRO to avoid dependency on the I/O timings.
3. Register the interrupt-handler by using the peripheral driver API CameraIntRegister. This function
registers and enables global camera interrupts from the interrupt controller.
4. Derive the external clock by programming the clock-divider values. The peripheral driver API
CameraXClkConfig sets the appropriate bits in this register for setting the internal clock divider.
5. MCLK is, by default, set to 120 MHz, and cannot be modified. Hence, an XCLK of:
• 5 MHz can be derived by calling:
CameraXClkConfig(CAMERA_BASE, 120000000, 5000000)
• 10 MHz can be derived by calling:
CameraXClkConfig(CAMERA_BASE, 120000000, 10000000)
NOTE: The maximum supported division is 30; a 2-MHz XCLK cannot be derived by using a
120-MHz MCLK.
6. Set the FIFO threshold by using the peripheral driver API CameraThresholdSet. This function sets the
threshold at which to generate a DMA request.
CameraThresholdSet(CAMERA_BASE, 8);
7. For handling the image data that is not a multiple of a FIFO threshold, register the frame-end interrupt
by using the peripheral API CameraIntEnable. This generates an interrupt at the end of every frame:
CameraIntEnable(CAMERA_BASE, CAM_INT_FE)
8. Enable the DMA interface of the camera control block by using the peripheral driver API
CameraDMAEnable.
CameraDMAEnable(CAMERA_BASE)
9. Configure the DMA interface of the camera control block. As an example, configure the DMA in ping-
pong mode:
• First, initialize the DMA interface by using the peripheral driver API UDMAInit.
• The ping-pong transfer can be set up by using the peripheral driver API DMASetupTransfer. The
following code shows how this API could be used:
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