Timer Registers
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SWRU543–January 2019
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General-Purpose Timers
9.5.14 GPTMTBPR Register (offset = 3Ch) [reset = 0h]
GPTMTBPR is shown in Figure 9-18 and described in Table 9-22.
This register allows software to extend the range of the timers when they are used individually. When in
one-shot or periodic down count modes, this register acts as a true prescaler for the timer counter. When
acting as a true prescaler, the prescaler counts down to 0 before the value in the GPTMTBR and
GPTMTBPR registers are incremented. In all other individual or split modes, this register is a linear
extension of the upper range of the timer counter, holding bits 23:16 in the 16-bit modes of the 16/32-bit
GPTM.
Figure 9-18. GPTMTBPR Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESERVED TBPSR
R-X R/W-0h
Table 9-22. GPTMTBPR Register Field Descriptions
Bit Field Type Reset Description
31-8 RESERVED R X
7-0 TBPSR R/W 0h
GPTM Timer B Prescale. The register loads this value on a write. A
read returns the current value of this register. For the 16/32-bit
GPTM, this field contains the entire 8-bit prescaler.
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