Texas Instruments CC3235 SimpleLink Series - CC_IRQENABLE Register Field Descriptions

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SWRU543–January 2019
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Parallel Camera Interface Module
Table 14-7. CC_IRQENABLE Register Field Descriptions (continued)
Bit Field Type Reset Description
7-5 RESERVED R/W 0h
4 FIFO_NOEMPTY_IRQ_E
N
R/W 0h
FIFO Not Empty Interrupt Enable
0h = Event is masked
1h = Event generates an interrupt when it occurs
3 FIFO_FULL_IRQ_EN R/W 0h
FIFO Full Interrupt Enable
0h = Event is masked
1h = Event generates an interrupt when it occurs
2 FIFO_THR_IRQ_EN R/W 0h
FIFO Threshold Interrupt Enable
0h = Event is masked
1h = Event generates an interrupt when it occurs
1 FIFO_OF_IRQ_EN R/W 0h
FIFO Overflow Interrupt Enable
0h = Event is masked
1h = Event generates an interrupt when it occurs
0 FIFO_UF_IRQ_EN R/W 0h
FIFO Underflow Interrupt Enable
0h = Event is masked
1h = Event generates an interrupt when it occurs