I2C Registers
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SWRU543–January 2019
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Inter-Integrated Circuit (I
2
C) Interface
7.3.12 I2CMBLEN Register (Offset = 30h) [reset = 0h]
I2CMBLEN is shown in Figure 7-25 and described in Table 7-16.
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This register contains the programmed length of bytes that are transferred during a burst request.
Figure 7-25. I2CMBLEN Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESERVED CNTL
R-0h R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 7-16. I2CMBLEN Register Field Descriptions
Bit Field Type Reset Description
31-8 RESERVED R 0h
7-0 CNTL R/W 0h
I2C Burst Length
This field contains the programmed length of bytes of the burst
transaction. If BURST is enabled, this register must be set to a non-
zero value, otherwise an error will occur.
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