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SD-HOST Registers
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SWRU543–January 2019
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SD Host Controller Interface
11.7.14 MMCHS_STAT Register (Offset = 230h) [reset = 0h]
Interrupt Status register
MMCHS_STAT is shown in Figure 11-15 and described in Table 11-18.
Return to Summary Table.
The interrupt status regroups all the status of the module internal events that can generate an interrupt.
MMCHS_STAT[31:16] = Error Interrupt Status
MMCHS_STAT[15:0] = Normal Interrupt Status
Figure 11-15. MMCHS_STAT Register
31 30 29 28 27 26 25 24
RESERVED BADA CERR RESERVED
R-0h R/W-0h R/W-0h R-0h
23 22 21 20 19 18 17 16
RESERVED DEB DCRC DTO RESERVED CEB CCRC CTO
R-0h R/W-0h R/W-0h R/W-0h R-0h R/W-0h R/W-0h R/W-0h
15 14 13 12 11 10 9 8
ERRI RESERVED
R-0h R-0h
7 6 5 4 3 2 1 0
RESERVED BRR BWR RESERVED TC CC
R-0h R/W-0h R/W-0h R-0h R/W-0h R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 11-18. MMCHS_STAT Register Field Descriptions
Bit Field Type Reset Description
31-30 RESERVED R 0h
29 BADA R/W 0h
Bad access to data space
This bit is set automatically to indicate a bad access to buffer when
not allowed:
During a read access to the data register (MMCi.MMCHS_DATA)
while buffer reads are not allowed (MMCi.MMCHS_PSTATE[11]
BRE bit =0)
During a write access to the data register (MMCi.MMCHS_DATA)
while buffer writes are not allowed (MMCi.MMCHS_PSTATE[10]
BWE bit=0)
Read 0h = No interrupt
Write 0h = Status bit unchanged
Read 1h = Bad access
Write 1h = Status is cleared
28 CERR R/W 0h
Card error
This bit is set automatically when there is at least one error in a
response of type R1, R1b, R6, R5, or R5b. Only bits referenced as
type E (error) in the status field in the response can set a card status
error. An error bit in the response is flagged only if corresponding bit
in card status response error MMCi.MMCHS_CSRE in set.
There is no card error detection for the autoCMD12 command. The
host driver reads MMCi.MMCHS_RSP76 register to detect error bits
in the command response.
Read 0h = No error
Write 0h = Status bit unchanged
Read 1h = Card error
Write 1h = Status is cleared
27-23 RESERVED R 0h