Texas Instruments CC3235 SimpleLink Series - SHAMD5_DATA2_IN Register; SHAMD5_DATA2_IN Register Field Descriptions

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SWRU543–January 2019
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SHA/MD5 Accelerator
19.2.22 SHAMD5_DATA2_IN Register (Offset = 88h) [reset = 0h]
SHAMD5_DATA2_IN is shown in Figure 19-26 and described in Table 19-33.
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Data input message 2
Figure 19-26. SHAMD5_DATA2_IN Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
DATA2_IN
R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 19-33. SHAMD5_DATA2_IN Register Field Descriptions
Bit Field Type Reset Description
31-0 DATA2_IN R/W 0h
Data