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DES Registers
685
SWRU543–January 2019
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Data Encryption Standard Accelerator (DES)
18.5.12 DES_IV_H Register (Offset = 101Ch) [reset = 0h]
DES_IV_H is shown in Figure 18-19 and described in Table 18-19.
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Initialization vector MSW
Figure 18-19. DES_IV_H Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
IV_H
R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 18-19. DES_IV_H Register Field Descriptions
Bit Field Type Reset Description
31-0 IV_H R/W 0h
Initialization vector for CBC, CFB modes.