SD-HOST Registers
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SWRU543–January 2019
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SD Host Controller Interface
11.7.1 MMCHS_CSRE Register (Offset = 124h) [reset = 0h]
Card Status Response Error register
MMCHS_CSRE is shown in Figure 11-2 and described in Table 11-5.
Return to Summary Table.
This register enables the host controller to detect card status errors of response type R1, R1b for all cards
and of R5, R5b and R6 response for cards types SD or SDIO.
When a bit MMCi.MMCHS_CSRE[I] is set to 1, if the corresponding bit at the same position in the
response MMCi.MMCHS_RSP10[I] is set to 1, the host controller indicates a card error
(MMCi.MMCHS_STAT[28] CERR bit) interrupt status to avoid the host driver reading the response
register (MMCi.MMCHS_RSP10).
NOTE: No automatic card error detection for autoCMD12 is implemented; the host system must
check autoCMD12 response register (MMCi.MMCHS_RSP76) for possible card errors.
Figure 11-2. MMCHS_CSRE Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CSRE
R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 11-5. MMCHS_CSRE Register Field Descriptions
Bit Field Type Reset Description
31-0 CSRE R/W 0h
Card status response error
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