AES Registers
www.ti.com
632
SWRU543–January 2019
Submit Documentation Feedback
Copyright © 2019, Texas Instruments Incorporated
Advance Encryption Standard Accelerator (AES)
17.4 AES Registers
Table 17-3 lists the memory-mapped registers for the AES. All register offset addresses not listed in
Table 17-3 should be considered as reserved locations and the register contents should not be modified.
Table 17-3. AES Registers
Offset Acronym Register Name Section
0h AES_KEY2_6 Key register Section 17.4.1
4h AES_KEY2_7 Key register Section 17.4.2
8h AES_KEY2_4 Key register Section 17.4.3
Ch AES_KEY2_5 Key register Section 17.4.4
10h AES_KEY2_2 Key register Section 17.4.5
14h AES_KEY2_3 Key register Section 17.4.6
18h AES_KEY2_0 Key register Section 17.4.7
1Ch AES_KEY2_1 Key register Section 17.4.8
20h AES_KEY1_6 Key register Section 17.4.9
24h AES_KEY1_7 Key register Section 17.4.10
28h AES_KEY1_4 Key register Section 17.4.11
2Ch AES_KEY1_5 Key register Section 17.4.12
30h AES_KEY1_2 Key register Section 17.4.13
34h AES_KEY1_3 Key register Section 17.4.14
38h AES_KEY1_0 Key register Section 17.4.15
3Ch AES_KEY1_1 Key register Section 17.4.16
40h AES_IV_IN_0 Section 17.4.17
44h AES_IV_IN_1 Section 17.4.18
48h AES_IV_IN_2 Section 17.4.19
4Ch AES_IV_IN_3 Section 17.4.20
50h AES_CTRL Section 17.4.21
54h AES_C_LENGTH_0 Section 17.4.22
58h AES_C_LENGTH_1 Section 17.4.23
5Ch AES_AUTH_LENGTH Section 17.4.24
60h AES_DATA_IN_0 Data register Section 17.4.25
64h AES_DATA_IN_1 Data register Section 17.4.26
68h AES_DATA_IN_2 Data register Section 17.4.27
6Ch AES_DATA_IN_3 Data register Section 17.4.28
70h AES_TAG_OUT_0 Section 17.4.29
74h AES_TAG_OUT_1 Section 17.4.30
78h AES_TAG_OUT_2 Section 17.4.31
7Ch AES_TAG_OUT_3 Section 17.4.32
80h AES_REVISION Section 17.4.33
84h AES_SYSCONFIG Section 17.4.34
8Ch AES_IRQSTATUS Section 17.4.35
90h AES_IRQENABLE Section 17.4.36
B8h CRYPTOCLKEN Section 17.4.37
820h DTHE_AES_IM AES Interrupt Mask Set register Section 17.4.38
824h DTHE_AES_RIS AES Interrupt Raw Interrupt Status register Section 17.4.39
828h DTHE_AES_MIS AES Interrupt Masked interrupt Status register Section 17.4.40
82Ch DTHE_AES_IC AES Interrupt Clear Interrupt Status register Section 17.4.41