www.ti.com
Timer Registers
339
SWRU543–January 2019
Submit Documentation Feedback
Copyright © 2019, Texas Instruments Incorporated
General-Purpose Timers
9.5.15 GPTMTAPMR Register (offset = 40h) [reset = 0h]
GPTMTAPMR is shown in Figure 9-19 and described in Table 9-23.
This register allows software to extend the range of the GPTMTAMATCHR when the timers are used
individually. This register holds bits 23:16 in the 16-bit modes of the 16/32-bit GPTM.
Figure 9-19. GPTMTAPMR Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESERVED TAPSMR
R-X R/W-0h
Table 9-23. GPTMTAPMR Register Field Descriptions
Bit Field Type Reset Description
31-8 RESERVED R X
7-0 TAPSMR R/W 0h
GPTM Timer A Prescale Match. This value is used alongside
GPTMTAMATCHR to detect timer match events while using a
prescaler. For the 16/32-bit GPTM, this field contains the entire 8-bit
prescaler match value.
To Next Page
Loading...
